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@ -22,6 +22,7 @@ Maxwell3D::Maxwell3D(Core::System& system, VideoCore::RasterizerInterface& raste
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MemoryManager& memory_manager)
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: system{system}, rasterizer{rasterizer}, memory_manager{memory_manager},
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macro_interpreter{*this}, upload_state{memory_manager, regs.upload} {
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InitDirtySettings();
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InitializeRegisterDefaults();
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}
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@ -69,6 +70,10 @@ void Maxwell3D::InitializeRegisterDefaults() {
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regs.stencil_back_func_mask = 0xFFFFFFFF;
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regs.stencil_back_mask = 0xFFFFFFFF;
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regs.depth_test_func = Regs::ComparisonOp::Always;
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regs.cull.front_face = Regs::Cull::FrontFace::CounterClockWise;
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regs.cull.cull_face = Regs::Cull::CullFace::Back;
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// TODO(Rodrigo): Most games do not set a point size. I think this is a case of a
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// register carrying a default value. Assume it's OpenGL's default (1).
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regs.point_size = 1.0f;
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@ -86,6 +91,159 @@ void Maxwell3D::InitializeRegisterDefaults() {
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regs.rt_separate_frag_data = 1;
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}
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#define DIRTY_REGS_POS(field_name) (offsetof(Maxwell3D::DirtyRegs, field_name))
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void Maxwell3D::InitDirtySettings() {
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const auto set_block = [this](const u32 start, const u32 range, const u8 position) {
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const auto start_itr = dirty_pointers.begin() + start;
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const auto end_itr = start_itr + range;
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std::fill(start_itr, end_itr, position);
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};
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dirty.regs.fill(true);
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// Init Render Targets
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constexpr u32 registers_per_rt = sizeof(regs.rt[0]) / sizeof(u32);
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constexpr u32 rt_start_reg = MAXWELL3D_REG_INDEX(rt);
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constexpr u32 rt_end_reg = rt_start_reg + registers_per_rt * 8;
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u32 rt_dirty_reg = DIRTY_REGS_POS(render_target);
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for (u32 rt_reg = rt_start_reg; rt_reg < rt_end_reg; rt_reg += registers_per_rt) {
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set_block(rt_reg, registers_per_rt, rt_dirty_reg);
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rt_dirty_reg++;
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}
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constexpr u32 depth_buffer_flag = DIRTY_REGS_POS(depth_buffer);
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dirty_pointers[MAXWELL3D_REG_INDEX(zeta_enable)] = depth_buffer_flag;
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dirty_pointers[MAXWELL3D_REG_INDEX(zeta_width)] = depth_buffer_flag;
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dirty_pointers[MAXWELL3D_REG_INDEX(zeta_height)] = depth_buffer_flag;
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constexpr u32 registers_in_zeta = sizeof(regs.zeta) / sizeof(u32);
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constexpr u32 zeta_reg = MAXWELL3D_REG_INDEX(zeta);
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set_block(zeta_reg, registers_in_zeta, depth_buffer_flag);
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// Init Vertex Arrays
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constexpr u32 vertex_array_start = MAXWELL3D_REG_INDEX(vertex_array);
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constexpr u32 vertex_array_size = sizeof(regs.vertex_array[0]) / sizeof(u32);
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constexpr u32 vertex_array_end = vertex_array_start + vertex_array_size * Regs::NumVertexArrays;
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u32 va_reg = DIRTY_REGS_POS(vertex_array);
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u32 vi_reg = DIRTY_REGS_POS(vertex_instance);
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for (u32 vertex_reg = vertex_array_start; vertex_reg < vertex_array_end;
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vertex_reg += vertex_array_size) {
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set_block(vertex_reg, 3, va_reg);
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// The divisor concerns vertex array instances
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dirty_pointers[vertex_reg + 3] = vi_reg;
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va_reg++;
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vi_reg++;
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}
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constexpr u32 vertex_limit_start = MAXWELL3D_REG_INDEX(vertex_array_limit);
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constexpr u32 vertex_limit_size = sizeof(regs.vertex_array_limit[0]) / sizeof(u32);
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constexpr u32 vertex_limit_end = vertex_limit_start + vertex_limit_size * Regs::NumVertexArrays;
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va_reg = DIRTY_REGS_POS(vertex_array);
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for (u32 vertex_reg = vertex_limit_start; vertex_reg < vertex_limit_end;
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vertex_reg += vertex_limit_size) {
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set_block(vertex_reg, vertex_limit_size, va_reg);
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va_reg++;
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}
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constexpr u32 vertex_instance_start = MAXWELL3D_REG_INDEX(instanced_arrays);
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constexpr u32 vertex_instance_size =
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sizeof(regs.instanced_arrays.is_instanced[0]) / sizeof(u32);
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constexpr u32 vertex_instance_end =
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vertex_instance_start + vertex_instance_size * Regs::NumVertexArrays;
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vi_reg = DIRTY_REGS_POS(vertex_instance);
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for (u32 vertex_reg = vertex_instance_start; vertex_reg < vertex_instance_end;
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vertex_reg += vertex_instance_size) {
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set_block(vertex_reg, vertex_instance_size, vi_reg);
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vi_reg++;
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}
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set_block(MAXWELL3D_REG_INDEX(vertex_attrib_format), regs.vertex_attrib_format.size(),
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DIRTY_REGS_POS(vertex_attrib_format));
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// Init Shaders
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constexpr u32 shader_registers_count =
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sizeof(regs.shader_config[0]) * Regs::MaxShaderProgram / sizeof(u32);
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set_block(MAXWELL3D_REG_INDEX(shader_config[0]), shader_registers_count,
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DIRTY_REGS_POS(shaders));
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// State
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// Viewport
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constexpr u32 viewport_dirty_reg = DIRTY_REGS_POS(viewport);
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constexpr u32 viewport_start = MAXWELL3D_REG_INDEX(viewports);
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constexpr u32 viewport_size = sizeof(regs.viewports) / sizeof(u32);
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set_block(viewport_start, viewport_size, viewport_dirty_reg);
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constexpr u32 view_volume_start = MAXWELL3D_REG_INDEX(view_volume_clip_control);
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constexpr u32 view_volume_size = sizeof(regs.view_volume_clip_control) / sizeof(u32);
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set_block(view_volume_start, view_volume_size, viewport_dirty_reg);
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// Viewport transformation
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constexpr u32 viewport_trans_start = MAXWELL3D_REG_INDEX(viewport_transform);
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constexpr u32 viewport_trans_size = sizeof(regs.viewport_transform) / sizeof(u32);
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set_block(viewport_trans_start, viewport_trans_size, DIRTY_REGS_POS(viewport_transform));
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// Cullmode
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constexpr u32 cull_mode_start = MAXWELL3D_REG_INDEX(cull);
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constexpr u32 cull_mode_size = sizeof(regs.cull) / sizeof(u32);
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set_block(cull_mode_start, cull_mode_size, DIRTY_REGS_POS(cull_mode));
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// Screen y control
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dirty_pointers[MAXWELL3D_REG_INDEX(screen_y_control)] = DIRTY_REGS_POS(screen_y_control);
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// Primitive Restart
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constexpr u32 primitive_restart_start = MAXWELL3D_REG_INDEX(primitive_restart);
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constexpr u32 primitive_restart_size = sizeof(regs.primitive_restart) / sizeof(u32);
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set_block(primitive_restart_start, primitive_restart_size, DIRTY_REGS_POS(primitive_restart));
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// Depth Test
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constexpr u32 depth_test_dirty_reg = DIRTY_REGS_POS(depth_test);
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dirty_pointers[MAXWELL3D_REG_INDEX(depth_test_enable)] = depth_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(depth_write_enabled)] = depth_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(depth_test_func)] = depth_test_dirty_reg;
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// Stencil Test
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constexpr u32 stencil_test_dirty_reg = DIRTY_REGS_POS(stencil_test);
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_enable)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_front_func_func)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_front_func_ref)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_front_func_mask)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_front_op_fail)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_front_op_zfail)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_front_op_zpass)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_front_mask)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_two_side_enable)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_back_func_func)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_back_func_ref)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_back_func_mask)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_back_op_fail)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_back_op_zfail)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_back_op_zpass)] = stencil_test_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(stencil_back_mask)] = stencil_test_dirty_reg;
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// Color Mask
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constexpr u32 color_mask_dirty_reg = DIRTY_REGS_POS(color_mask);
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dirty_pointers[MAXWELL3D_REG_INDEX(color_mask_common)] = color_mask_dirty_reg;
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set_block(MAXWELL3D_REG_INDEX(color_mask), sizeof(regs.color_mask) / sizeof(u32),
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color_mask_dirty_reg);
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// Blend State
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constexpr u32 blend_state_dirty_reg = DIRTY_REGS_POS(blend_state);
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set_block(MAXWELL3D_REG_INDEX(blend_color), sizeof(regs.blend_color) / sizeof(u32),
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blend_state_dirty_reg);
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dirty_pointers[MAXWELL3D_REG_INDEX(independent_blend_enable)] = blend_state_dirty_reg;
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set_block(MAXWELL3D_REG_INDEX(blend), sizeof(regs.blend) / sizeof(u32), blend_state_dirty_reg);
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set_block(MAXWELL3D_REG_INDEX(independent_blend), sizeof(regs.independent_blend) / sizeof(u32),
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blend_state_dirty_reg);
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// Scissor State
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constexpr u32 scissor_test_dirty_reg = DIRTY_REGS_POS(scissor_test);
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set_block(MAXWELL3D_REG_INDEX(scissor_test), sizeof(regs.scissor_test) / sizeof(u32),
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scissor_test_dirty_reg);
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// Polygon Offset
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constexpr u32 polygon_offset_dirty_reg = DIRTY_REGS_POS(polygon_offset);
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dirty_pointers[MAXWELL3D_REG_INDEX(polygon_offset_fill_enable)] = polygon_offset_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(polygon_offset_line_enable)] = polygon_offset_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(polygon_offset_point_enable)] = polygon_offset_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(polygon_offset_units)] = polygon_offset_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(polygon_offset_factor)] = polygon_offset_dirty_reg;
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dirty_pointers[MAXWELL3D_REG_INDEX(polygon_offset_clamp)] = polygon_offset_dirty_reg;
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}
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void Maxwell3D::CallMacroMethod(u32 method, std::vector<u32> parameters) {
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// Reset the current macro.
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executing_macro = 0;
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@ -108,6 +266,14 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
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const u32 method = method_call.method;
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if (method == cb_data_state.current) {
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regs.reg_array[method] = method_call.argument;
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ProcessCBData(method_call.argument);
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return;
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} else if (cb_data_state.current != null_cb_data) {
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FinishCBData();
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}
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// It is an error to write to a register other than the current macro's ARG register before it
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// has finished execution.
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if (executing_macro != 0) {
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@ -143,49 +309,19 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
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if (regs.reg_array[method] != method_call.argument) {
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regs.reg_array[method] = method_call.argument;
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// Color buffers
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constexpr u32 first_rt_reg = MAXWELL3D_REG_INDEX(rt);
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constexpr u32 registers_per_rt = sizeof(regs.rt[0]) / sizeof(u32);
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if (method >= first_rt_reg &&
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method < first_rt_reg + registers_per_rt * Regs::NumRenderTargets) {
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const std::size_t rt_index = (method - first_rt_reg) / registers_per_rt;
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dirty_flags.color_buffer.set(rt_index);
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}
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// Zeta buffer
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constexpr u32 registers_in_zeta = sizeof(regs.zeta) / sizeof(u32);
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if (method == MAXWELL3D_REG_INDEX(zeta_enable) ||
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method == MAXWELL3D_REG_INDEX(zeta_width) ||
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method == MAXWELL3D_REG_INDEX(zeta_height) ||
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(method >= MAXWELL3D_REG_INDEX(zeta) &&
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method < MAXWELL3D_REG_INDEX(zeta) + registers_in_zeta)) {
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dirty_flags.zeta_buffer = true;
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}
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// Shader
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constexpr u32 shader_registers_count =
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sizeof(regs.shader_config[0]) * Regs::MaxShaderProgram / sizeof(u32);
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if (method >= MAXWELL3D_REG_INDEX(shader_config[0]) &&
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method < MAXWELL3D_REG_INDEX(shader_config[0]) + shader_registers_count) {
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dirty_flags.shaders = true;
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}
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// Vertex format
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if (method >= MAXWELL3D_REG_INDEX(vertex_attrib_format) &&
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method < MAXWELL3D_REG_INDEX(vertex_attrib_format) + regs.vertex_attrib_format.size()) {
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dirty_flags.vertex_attrib_format = true;
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}
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// Vertex buffer
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if (method >= MAXWELL3D_REG_INDEX(vertex_array) &&
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method < MAXWELL3D_REG_INDEX(vertex_array) + 4 * Regs::NumVertexArrays) {
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dirty_flags.vertex_array.set((method - MAXWELL3D_REG_INDEX(vertex_array)) >> 2);
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} else if (method >= MAXWELL3D_REG_INDEX(vertex_array_limit) &&
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method < MAXWELL3D_REG_INDEX(vertex_array_limit) + 2 * Regs::NumVertexArrays) {
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dirty_flags.vertex_array.set((method - MAXWELL3D_REG_INDEX(vertex_array_limit)) >> 1);
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} else if (method >= MAXWELL3D_REG_INDEX(instanced_arrays) &&
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method < MAXWELL3D_REG_INDEX(instanced_arrays) + Regs::NumVertexArrays) {
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dirty_flags.vertex_array.set(method - MAXWELL3D_REG_INDEX(instanced_arrays));
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const std::size_t dirty_reg = dirty_pointers[method];
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if (dirty_reg) {
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dirty.regs[dirty_reg] = true;
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if (dirty_reg >= DIRTY_REGS_POS(vertex_array) &&
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dirty_reg < DIRTY_REGS_POS(vertex_array_buffers)) {
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dirty.vertex_array_buffers = true;
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} else if (dirty_reg >= DIRTY_REGS_POS(vertex_instance) &&
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dirty_reg < DIRTY_REGS_POS(vertex_instances)) {
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dirty.vertex_instances = true;
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} else if (dirty_reg >= DIRTY_REGS_POS(render_target) &&
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dirty_reg < DIRTY_REGS_POS(render_settings)) {
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dirty.render_settings = true;
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}
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}
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}
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@ -214,7 +350,7 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
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case MAXWELL3D_REG_INDEX(const_buffer.cb_data[13]):
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case MAXWELL3D_REG_INDEX(const_buffer.cb_data[14]):
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|
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case MAXWELL3D_REG_INDEX(const_buffer.cb_data[15]): {
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ProcessCBData(method_call.argument);
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|
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|
StartCBData(method);
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|
break;
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}
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|
|
|
|
case MAXWELL3D_REG_INDEX(cb_bind[0].raw_config): {
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|
@ -261,7 +397,7 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
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|
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|
const bool is_last_call = method_call.IsLastCall();
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|
|
|
|
upload_state.ProcessData(method_call.argument, is_last_call);
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|
|
|
|
if (is_last_call) {
|
|
|
|
|
dirty_flags.OnMemoryWrite();
|
|
|
|
|
dirty.OnMemoryWrite();
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
@ -333,7 +469,6 @@ void Maxwell3D::ProcessQueryGet() {
|
|
|
|
|
query_result.timestamp = system.CoreTiming().GetTicks();
|
|
|
|
|
memory_manager.WriteBlock(sequence_address, &query_result, sizeof(query_result));
|
|
|
|
|
}
|
|
|
|
|
dirty_flags.OnMemoryWrite();
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
default:
|
|
|
|
@ -405,23 +540,39 @@ void Maxwell3D::ProcessCBBind(Regs::ShaderStage stage) {
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void Maxwell3D::ProcessCBData(u32 value) {
|
|
|
|
|
const u32 id = cb_data_state.id;
|
|
|
|
|
cb_data_state.buffer[id][cb_data_state.counter] = value;
|
|
|
|
|
// Increment the current buffer position.
|
|
|
|
|
regs.const_buffer.cb_pos = regs.const_buffer.cb_pos + 4;
|
|
|
|
|
cb_data_state.counter++;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void Maxwell3D::StartCBData(u32 method) {
|
|
|
|
|
constexpr u32 first_cb_data = MAXWELL3D_REG_INDEX(const_buffer.cb_data[0]);
|
|
|
|
|
cb_data_state.start_pos = regs.const_buffer.cb_pos;
|
|
|
|
|
cb_data_state.id = method - first_cb_data;
|
|
|
|
|
cb_data_state.current = method;
|
|
|
|
|
cb_data_state.counter = 0;
|
|
|
|
|
ProcessCBData(regs.const_buffer.cb_data[cb_data_state.id]);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void Maxwell3D::FinishCBData() {
|
|
|
|
|
// Write the input value to the current const buffer at the current position.
|
|
|
|
|
const GPUVAddr buffer_address = regs.const_buffer.BufferAddress();
|
|
|
|
|
ASSERT(buffer_address != 0);
|
|
|
|
|
|
|
|
|
|
// Don't allow writing past the end of the buffer.
|
|
|
|
|
ASSERT(regs.const_buffer.cb_pos + sizeof(u32) <= regs.const_buffer.cb_size);
|
|
|
|
|
ASSERT(regs.const_buffer.cb_pos <= regs.const_buffer.cb_size);
|
|
|
|
|
|
|
|
|
|
const GPUVAddr address{buffer_address + regs.const_buffer.cb_pos};
|
|
|
|
|
const GPUVAddr address{buffer_address + cb_data_state.start_pos};
|
|
|
|
|
const std::size_t size = regs.const_buffer.cb_pos - cb_data_state.start_pos;
|
|
|
|
|
|
|
|
|
|
u8* ptr{memory_manager.GetPointer(address)};
|
|
|
|
|
rasterizer.InvalidateRegion(ToCacheAddr(ptr), sizeof(u32));
|
|
|
|
|
memory_manager.Write<u32>(address, value);
|
|
|
|
|
const u32 id = cb_data_state.id;
|
|
|
|
|
memory_manager.WriteBlock(address, cb_data_state.buffer[id].data(), size);
|
|
|
|
|
dirty.OnMemoryWrite();
|
|
|
|
|
|
|
|
|
|
dirty_flags.OnMemoryWrite();
|
|
|
|
|
|
|
|
|
|
// Increment the current buffer position.
|
|
|
|
|
regs.const_buffer.cb_pos = regs.const_buffer.cb_pos + 4;
|
|
|
|
|
cb_data_state.id = null_cb_data;
|
|
|
|
|
cb_data_state.current = null_cb_data;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
Texture::TICEntry Maxwell3D::GetTICEntry(u32 tic_index) const {
|
|
|
|
|