mirror of https://git.suyu.dev/suyu/suyu
Common: Ported over Dolphin's code for x86 CPU capability detection.
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// Copyright 2014 Dolphin Emulator Project
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// Licensed under GPLv2+
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// Refer to the license.txt file included.
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#include "cpu_detect.h"
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namespace Common {
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CPUInfo cpu_info;
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CPUInfo::CPUInfo() { }
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std::string CPUInfo::Summarize() {
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return "Generic";
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}
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} // namespace Common
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// Copyright 2008 Dolphin Emulator Project
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// Licensed under GPLv2+
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// Refer to the license.txt file included.
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#include <cstring>
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#include <string>
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#include "common_types.h"
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#include "cpu_detect.h"
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#ifndef _WIN32
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#ifdef __FreeBSD__
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#include <sys/types.h>
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#include <machine/cpufunc.h>
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#endif
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static inline void __cpuidex(int info[4], int function_id, int subfunction_id)
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{
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#ifdef __FreeBSD__
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// Despite the name, this is just do_cpuid() with ECX as second input.
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cpuid_count((u_int)function_id, (u_int)subfunction_id, (u_int*)info);
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#else
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info[0] = function_id; // eax
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info[2] = subfunction_id; // ecx
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__asm__(
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"cpuid"
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: "=a" (info[0]),
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"=b" (info[1]),
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"=c" (info[2]),
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"=d" (info[3])
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: "a" (function_id),
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"c" (subfunction_id)
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);
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#endif
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}
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static inline void __cpuid(int info[4], int function_id)
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{
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return __cpuidex(info, function_id, 0);
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}
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#define _XCR_XFEATURE_ENABLED_MASK 0
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static u64 _xgetbv(u32 index)
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{
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u32 eax, edx;
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__asm__ __volatile__("xgetbv" : "=a"(eax), "=d"(edx) : "c"(index));
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return ((u64)edx << 32) | eax;
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}
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#endif // ifndef _WIN32
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namespace Common {
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CPUInfo cpu_info;
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CPUInfo::CPUInfo() {
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Detect();
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}
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// Detects the various CPU features
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void CPUInfo::Detect() {
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memset(this, 0, sizeof(*this));
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#ifdef _M_X86_64
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Mode64bit = true;
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OS64bit = true;
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#endif
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num_cores = 1;
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// Set obvious defaults, for extra safety
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if (Mode64bit) {
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bSSE = true;
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bSSE2 = true;
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bLongMode = true;
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}
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// Assume CPU supports the CPUID instruction. Those that don't can barely
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// boot modern OS:es anyway.
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int cpu_id[4];
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memset(brand_string, 0, sizeof(brand_string));
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// Detect CPU's CPUID capabilities, and grab CPU string
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__cpuid(cpu_id, 0x00000000);
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u32 max_std_fn = cpu_id[0]; // EAX
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*((int *)brand_string) = cpu_id[1];
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*((int *)(brand_string + 4)) = cpu_id[3];
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*((int *)(brand_string + 8)) = cpu_id[2];
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__cpuid(cpu_id, 0x80000000);
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u32 max_ex_fn = cpu_id[0];
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if (!strcmp(brand_string, "GenuineIntel"))
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vendor = VENDOR_INTEL;
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else if (!strcmp(brand_string, "AuthenticAMD"))
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vendor = VENDOR_AMD;
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else
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vendor = VENDOR_OTHER;
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// Set reasonable default brand string even if brand string not available.
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strcpy(cpu_string, brand_string);
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// Detect family and other misc stuff.
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bool ht = false;
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HTT = ht;
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logical_cpu_count = 1;
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if (max_std_fn >= 1) {
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__cpuid(cpu_id, 0x00000001);
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int family = ((cpu_id[0] >> 8) & 0xf) + ((cpu_id[0] >> 20) & 0xff);
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int model = ((cpu_id[0] >> 4) & 0xf) + ((cpu_id[0] >> 12) & 0xf0);
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// Detect people unfortunate enough to be running Dolphin on an Atom
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if (family == 6 && (model == 0x1C || model == 0x26 || model == 0x27 || model == 0x35 || model == 0x36 ||
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model == 0x37 || model == 0x4A || model == 0x4D || model == 0x5A || model == 0x5D))
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bAtom = true;
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logical_cpu_count = (cpu_id[1] >> 16) & 0xFF;
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ht = (cpu_id[3] >> 28) & 1;
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if ((cpu_id[3] >> 25) & 1) bSSE = true;
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if ((cpu_id[3] >> 26) & 1) bSSE2 = true;
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if ((cpu_id[2]) & 1) bSSE3 = true;
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if ((cpu_id[2] >> 9) & 1) bSSSE3 = true;
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if ((cpu_id[2] >> 19) & 1) bSSE4_1 = true;
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if ((cpu_id[2] >> 20) & 1) bSSE4_2 = true;
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if ((cpu_id[2] >> 22) & 1) bMOVBE = true;
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if ((cpu_id[2] >> 25) & 1) bAES = true;
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if ((cpu_id[3] >> 24) & 1)
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{
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// We can use FXSAVE.
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bFXSR = true;
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}
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// AVX support requires 3 separate checks:
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// - Is the AVX bit set in CPUID?
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// - Is the XSAVE bit set in CPUID?
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// - XGETBV result has the XCR bit set.
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if (((cpu_id[2] >> 28) & 1) && ((cpu_id[2] >> 27) & 1)) {
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if ((_xgetbv(_XCR_XFEATURE_ENABLED_MASK) & 0x6) == 0x6) {
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bAVX = true;
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if ((cpu_id[2] >> 12) & 1)
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bFMA = true;
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}
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}
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if (max_std_fn >= 7) {
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__cpuidex(cpu_id, 0x00000007, 0x00000000);
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// careful; we can't enable AVX2 unless the XSAVE/XGETBV checks above passed
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if ((cpu_id[1] >> 5) & 1)
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bAVX2 = bAVX;
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if ((cpu_id[1] >> 3) & 1)
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bBMI1 = true;
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if ((cpu_id[1] >> 8) & 1)
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bBMI2 = true;
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}
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}
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bFlushToZero = bSSE;
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if (max_ex_fn >= 0x80000004) {
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// Extract CPU model string
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__cpuid(cpu_id, 0x80000002);
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memcpy(cpu_string, cpu_id, sizeof(cpu_id));
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__cpuid(cpu_id, 0x80000003);
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memcpy(cpu_string + 16, cpu_id, sizeof(cpu_id));
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__cpuid(cpu_id, 0x80000004);
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memcpy(cpu_string + 32, cpu_id, sizeof(cpu_id));
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}
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if (max_ex_fn >= 0x80000001) {
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// Check for more features.
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__cpuid(cpu_id, 0x80000001);
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if (cpu_id[2] & 1) bLAHFSAHF64 = true;
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if ((cpu_id[2] >> 5) & 1) bLZCNT = true;
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if ((cpu_id[2] >> 16) & 1) bFMA4 = true;
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if ((cpu_id[3] >> 29) & 1) bLongMode = true;
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}
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num_cores = (logical_cpu_count == 0) ? 1 : logical_cpu_count;
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if (max_ex_fn >= 0x80000008) {
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// Get number of cores. This is a bit complicated. Following AMD manual here.
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__cpuid(cpu_id, 0x80000008);
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int apic_id_core_id_size = (cpu_id[2] >> 12) & 0xF;
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if (apic_id_core_id_size == 0) {
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if (ht) {
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// New mechanism for modern Intel CPUs.
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if (vendor == VENDOR_INTEL) {
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__cpuidex(cpu_id, 0x00000004, 0x00000000);
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int cores_x_package = ((cpu_id[0] >> 26) & 0x3F) + 1;
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HTT = (cores_x_package < logical_cpu_count);
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cores_x_package = ((logical_cpu_count % cores_x_package) == 0) ? cores_x_package : 1;
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num_cores = (cores_x_package > 1) ? cores_x_package : num_cores;
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logical_cpu_count /= cores_x_package;
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}
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}
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} else {
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// Use AMD's new method.
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num_cores = (cpu_id[2] & 0xFF) + 1;
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}
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}
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}
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// Turn the CPU info into a string we can show
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std::string CPUInfo::Summarize() {
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std::string sum(cpu_string);
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sum += " (";
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sum += brand_string;
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sum += ")";
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if (bSSE) sum += ", SSE";
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if (bSSE2) {
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sum += ", SSE2";
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if (!bFlushToZero)
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sum += " (but not DAZ!)";
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}
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if (bSSE3) sum += ", SSE3";
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if (bSSSE3) sum += ", SSSE3";
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if (bSSE4_1) sum += ", SSE4.1";
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if (bSSE4_2) sum += ", SSE4.2";
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if (HTT) sum += ", HTT";
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if (bAVX) sum += ", AVX";
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if (bAVX2) sum += ", AVX2";
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if (bBMI1) sum += ", BMI1";
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if (bBMI2) sum += ", BMI2";
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if (bFMA) sum += ", FMA";
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if (bAES) sum += ", AES";
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if (bMOVBE) sum += ", MOVBE";
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if (bLongMode) sum += ", 64-bit support";
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return sum;
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}
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} // namespace Common
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