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@ -30,6 +30,8 @@ enum class OperationCode {
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FNegate, /// (MetaArithmetic, float a) -> float
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FAbsolute, /// (MetaArithmetic, float a) -> float
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FClamp, /// (MetaArithmetic, float value, float min, float max) -> float
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FCastHalf0, /// (MetaArithmetic, f16vec2 a) -> float
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FCastHalf1, /// (MetaArithmetic, f16vec2 a) -> float
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FMin, /// (MetaArithmetic, float a, float b) -> float
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FMax, /// (MetaArithmetic, float a, float b) -> float
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FCos, /// (MetaArithmetic, float a) -> float
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@ -83,17 +85,18 @@ enum class OperationCode {
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UBitfieldExtract, /// (MetaArithmetic, uint value, int offset, int offset) -> uint
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UBitCount, /// (MetaArithmetic, uint) -> uint
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HAdd, /// (MetaArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
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HMul, /// (MetaArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
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HFma, /// (MetaArithmetic, f16vec2 a, f16vec2 b, f16vec2 c) -> f16vec2
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HAbsolute, /// (f16vec2 a) -> f16vec2
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HNegate, /// (f16vec2 a, bool first, bool second) -> f16vec2
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HClamp, /// (f16vec2 src, float min, float max) -> f16vec2
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HUnpack, /// (Tegra::Shader::HalfType, T value) -> f16vec2
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HMergeF32, /// (f16vec2 src) -> float
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HMergeH0, /// (f16vec2 dest, f16vec2 src) -> f16vec2
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HMergeH1, /// (f16vec2 dest, f16vec2 src) -> f16vec2
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HPack2, /// (float a, float b) -> f16vec2
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HAdd, /// (MetaArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
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HMul, /// (MetaArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
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HFma, /// (MetaArithmetic, f16vec2 a, f16vec2 b, f16vec2 c) -> f16vec2
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HAbsolute, /// (f16vec2 a) -> f16vec2
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HNegate, /// (f16vec2 a, bool first, bool second) -> f16vec2
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HClamp, /// (f16vec2 src, float min, float max) -> f16vec2
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HCastFloat, /// (MetaArithmetic, float a) -> f16vec2
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HUnpack, /// (Tegra::Shader::HalfType, T value) -> f16vec2
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HMergeF32, /// (f16vec2 src) -> float
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HMergeH0, /// (f16vec2 dest, f16vec2 src) -> f16vec2
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HMergeH1, /// (f16vec2 dest, f16vec2 src) -> f16vec2
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HPack2, /// (float a, float b) -> f16vec2
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LogicalAssign, /// (bool& dst, bool src) -> void
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LogicalAnd, /// (bool a, bool b) -> bool
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