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@ -42,33 +42,38 @@ static inline InterruptRelayQueue* GetInterruptRelayQueue(u32 thread_id) {
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sizeof(InterruptRelayQueue) * thread_id);
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}
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void WriteHWRegs(u32 base_address, u32 size_in_bytes, const u32* data) {
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// TODO: Return proper error codes
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if (base_address + size_in_bytes >= 0x420000) {
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ERROR_LOG(GPU, "Write address out of range! (address=0x%08x, size=0x%08x)",
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base_address, size_in_bytes);
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return;
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}
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// size should be word-aligned
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if ((size_in_bytes % 4) != 0) {
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ERROR_LOG(GPU, "Invalid size 0x%08x", size_in_bytes);
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return;
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}
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while (size_in_bytes > 0) {
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GPU::Write<u32>(base_address + 0x1EB00000, *data);
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size_in_bytes -= 4;
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++data;
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base_address += 4;
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}
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}
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/// Write a GSP GPU hardware register
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void WriteHWRegs(Service::Interface* self) {
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u32* cmd_buff = Service::GetCommandBuffer();
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u32 reg_addr = cmd_buff[1];
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u32 size = cmd_buff[2];
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// TODO: Return proper error codes
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if (reg_addr + size >= 0x420000) {
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ERROR_LOG(GPU, "Write address out of range! (address=0x%08x, size=0x%08x)", reg_addr, size);
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return;
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}
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// size should be word-aligned
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if ((size % 4) != 0) {
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ERROR_LOG(GPU, "Invalid size 0x%08x", size);
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return;
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}
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u32* src = (u32*)Memory::GetPointer(cmd_buff[0x4]);
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while (size > 0) {
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GPU::Write<u32>(reg_addr + 0x1EB00000, *src);
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size -= 4;
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++src;
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reg_addr += 4;
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}
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WriteHWRegs(reg_addr, size, src);
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}
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/// Read a GSP GPU hardware register
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