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@ -49,65 +49,47 @@ enum {
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typedef unsigned int (*shtop_fp_t)(ARMul_State* cpu, unsigned int sht_oper);
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static int CondPassed(ARMul_State* cpu, unsigned int cond) {
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const u32 NFLAG = cpu->NFlag;
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const u32 ZFLAG = cpu->ZFlag;
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const u32 CFLAG = cpu->CFlag;
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const u32 VFLAG = cpu->VFlag;
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int temp = 0;
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static bool CondPassed(ARMul_State* cpu, unsigned int cond) {
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const bool n_flag = cpu->NFlag != 0;
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const bool z_flag = cpu->ZFlag != 0;
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const bool c_flag = cpu->CFlag != 0;
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const bool v_flag = cpu->VFlag != 0;
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switch (cond) {
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case 0x0:
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temp = ZFLAG;
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break;
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case 0x1: // NE
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temp = !ZFLAG;
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break;
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case 0x2: // CS
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temp = CFLAG;
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break;
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case 0x3: // CC
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temp = !CFLAG;
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break;
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case 0x4: // MI
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temp = NFLAG;
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break;
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case 0x5: // PL
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temp = !NFLAG;
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break;
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case 0x6: // VS
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temp = VFLAG;
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break;
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case 0x7: // VC
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temp = !VFLAG;
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break;
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case 0x8: // HI
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temp = (CFLAG && !ZFLAG);
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break;
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case 0x9: // LS
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temp = (!CFLAG || ZFLAG);
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break;
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case 0xa: // GE
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temp = ((!NFLAG && !VFLAG) || (NFLAG && VFLAG));
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break;
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case 0xb: // LT
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temp = ((NFLAG && !VFLAG) || (!NFLAG && VFLAG));
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break;
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case 0xc: // GT
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temp = ((!NFLAG && !VFLAG && !ZFLAG) || (NFLAG && VFLAG && !ZFLAG));
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break;
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case 0xd: // LE
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temp = ((NFLAG && !VFLAG) || (!NFLAG && VFLAG)) || ZFLAG;
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break;
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case 0xe: // AL
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temp = 1;
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break;
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case 0xf:
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temp = 1;
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break;
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case ConditionCode::EQ:
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return z_flag;
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case ConditionCode::NE:
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return !z_flag;
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case ConditionCode::CS:
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return c_flag;
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case ConditionCode::CC:
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return !c_flag;
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case ConditionCode::MI:
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return n_flag;
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case ConditionCode::PL:
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return !n_flag;
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case ConditionCode::VS:
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return v_flag;
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case ConditionCode::VC:
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return !v_flag;
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case ConditionCode::HI:
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return (c_flag && !z_flag);
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case ConditionCode::LS:
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return (!c_flag || z_flag);
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case ConditionCode::GE:
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return ((!n_flag && !v_flag) || (n_flag && v_flag));
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case ConditionCode::LT:
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return ((n_flag && !v_flag) || (!n_flag && v_flag));
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case ConditionCode::GT:
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return ((!n_flag && !v_flag && !z_flag) || (n_flag && v_flag && !z_flag));
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case ConditionCode::LE:
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return ((n_flag && !v_flag) || (!n_flag && v_flag)) || z_flag;
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case ConditionCode::AL:
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case ConditionCode::NV: // Unconditional
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return true;
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}
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return temp;
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return false;
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}
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static unsigned int DPO(Immediate)(ARMul_State* cpu, unsigned int sht_oper) {
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