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@ -43,8 +43,24 @@ public:
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}
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const auto cache_addr = ToCacheAddr(host_ptr);
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// Cache management is a big overhead, so only cache entries with a given size.
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// TODO: Figure out which size is the best for given games.
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constexpr std::size_t max_stream_size = 0x800;
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if (size < max_stream_size) {
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if (!is_written && !IsRegionWritten(cache_addr, cache_addr + size - 1)) {
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return StreamBufferUpload(host_ptr, size, alignment);
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}
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}
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auto block = GetBlock(cache_addr, size);
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MapAddress(block, gpu_addr, cache_addr, size);
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auto map = MapAddress(block, gpu_addr, cache_addr, size);
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if (is_written) {
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map->MarkAsModified(true, GetModifiedTicks());
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if (!map->IsWritten()) {
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map->MarkAsWritten(true);
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MarkRegionAsWritten(map->GetStart(), map->GetEnd() - 1);
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}
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}
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const u64 offset = static_cast<u64>(block->GetOffset(cache_addr));
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@ -124,7 +140,7 @@ protected:
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std::size_t dst_offset, std::size_t size) = 0;
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/// Register an object into the cache
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void Register(const MapInterval& new_map) {
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void Register(const MapInterval& new_map, bool inherit_written = false) {
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const CacheAddr cache_ptr = new_map->GetStart();
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const std::optional<VAddr> cpu_addr =
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system.GPU().MemoryManager().GpuToCpuAddress(new_map->GetGpuAddress());
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@ -139,6 +155,10 @@ protected:
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const IntervalType interval{new_map->GetStart(), new_map->GetEnd()};
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mapped_addresses.insert({interval, new_map});
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rasterizer.UpdatePagesCachedCount(*cpu_addr, size, 1);
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if (inherit_written) {
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MarkRegionAsWritten(new_map->GetStart(), new_map->GetEnd() - 1);
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new_map->MarkAsWritten(true);
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}
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}
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/// Unregisters an object from the cache
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@ -146,6 +166,9 @@ protected:
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const std::size_t size = map->GetEnd() - map->GetStart();
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rasterizer.UpdatePagesCachedCount(map->GetCpuAddress(), size, -1);
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map->MarkAsRegistered(false);
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if (map->IsWritten()) {
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UnmarkRegionAsWritten(map->GetStart(), map->GetEnd() - 1);
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}
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const IntervalType delete_interval{map->GetStart(), map->GetEnd()};
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mapped_addresses.erase(delete_interval);
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}
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@ -155,8 +178,8 @@ private:
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return std::make_shared<MapIntervalBase>(start, end, gpu_addr);
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}
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void MapAddress(const TBuffer& block, const GPUVAddr gpu_addr, const CacheAddr cache_addr,
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const std::size_t size) {
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MapInterval MapAddress(const TBuffer& block, const GPUVAddr gpu_addr,
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const CacheAddr cache_addr, const std::size_t size) {
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std::vector<MapInterval> overlaps = GetMapsInRange(cache_addr, size);
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if (overlaps.empty()) {
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@ -165,22 +188,24 @@ private:
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u8* host_ptr = FromCacheAddr(cache_addr);
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UploadBlockData(block, block->GetOffset(cache_addr), size, host_ptr);
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Register(new_map);
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return;
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return new_map;
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}
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const CacheAddr cache_addr_end = cache_addr + size;
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if (overlaps.size() == 1) {
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const MapInterval& current_map = overlaps[0];
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MapInterval& current_map = overlaps[0];
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if (current_map->IsInside(cache_addr, cache_addr_end)) {
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return;
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return current_map;
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}
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}
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CacheAddr new_start = cache_addr;
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CacheAddr new_end = cache_addr_end;
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bool write_inheritance = false;
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// Calculate new buffer parameters
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for (auto& overlap : overlaps) {
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new_start = std::min(overlap->GetStart(), new_start);
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new_end = std::max(overlap->GetEnd(), new_end);
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write_inheritance |= overlap->IsWritten();
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}
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GPUVAddr new_gpu_addr = gpu_addr + new_start - cache_addr;
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for (auto& overlap : overlaps) {
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@ -188,7 +213,8 @@ private:
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}
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UpdateBlock(block, new_start, new_end, overlaps);
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MapInterval new_map = CreateMap(new_start, new_end, new_gpu_addr);
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Register(new_map);
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Register(new_map, write_inheritance);
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return new_map;
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}
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void UpdateBlock(const TBuffer& block, CacheAddr start, CacheAddr end,
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@ -320,6 +346,48 @@ private:
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return found;
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}
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void MarkRegionAsWritten(const CacheAddr start, const CacheAddr end) {
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u64 page_start = start >> write_page_bit;
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const u64 page_end = end >> write_page_bit;
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while (page_start <= page_end) {
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auto it = written_pages.find(page_start);
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if (it != written_pages.end()) {
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it->second = it->second + 1;
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} else {
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written_pages[page_start] = 1;
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}
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page_start++;
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}
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}
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void UnmarkRegionAsWritten(const CacheAddr start, const CacheAddr end) {
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u64 page_start = start >> write_page_bit;
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const u64 page_end = end >> write_page_bit;
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while (page_start <= page_end) {
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auto it = written_pages.find(page_start);
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if (it != written_pages.end()) {
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if (it->second > 1) {
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it->second = it->second - 1;
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} else {
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written_pages.erase(it);
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}
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}
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page_start++;
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}
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}
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bool IsRegionWritten(const CacheAddr start, const CacheAddr end) const {
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u64 page_start = start >> write_page_bit;
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const u64 page_end = end >> write_page_bit;
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while (page_start <= page_end) {
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if (written_pages.count(page_start) > 0) {
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return true;
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}
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page_start++;
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}
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return false;
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}
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std::unique_ptr<StreamBuffer> stream_buffer;
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TBufferType stream_buffer_handle{};
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@ -334,11 +402,14 @@ private:
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using IntervalType = typename IntervalCache::interval_type;
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IntervalCache mapped_addresses{};
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static constexpr u64 block_page_bits{24};
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static constexpr u64 block_page_size{1 << block_page_bits};
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std::unordered_map<u64, TBuffer> blocks;
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static constexpr u64 write_page_bit{11};
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std::unordered_map<u64, u32> written_pages{};
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std::list<TBuffer> pending_destruction;
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static constexpr u64 block_page_bits{21};
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static constexpr u64 block_page_size{1 << block_page_bits};
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std::unordered_map<u64, TBuffer> blocks{};
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std::list<TBuffer> pending_destruction{};
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u64 epoch{};
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u64 modified_ticks{};
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VideoCore::RasterizerInterface& rasterizer;
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