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@ -23,7 +23,7 @@ const JitFunction instr_table[64] = {
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&JitCompiler::Compile_ADD, // add
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&JitCompiler::Compile_DP3, // dp3
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&JitCompiler::Compile_DP4, // dp4
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nullptr, // dph
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&JitCompiler::Compile_DPH, // dph
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nullptr, // unknown
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&JitCompiler::Compile_EX2, // ex2
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&JitCompiler::Compile_LG2, // lg2
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@ -44,7 +44,7 @@ const JitFunction instr_table[64] = {
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nullptr, // unknown
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nullptr, // unknown
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nullptr, // unknown
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nullptr, // dphi
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&JitCompiler::Compile_DPH, // dphi
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nullptr, // unknown
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&JitCompiler::Compile_SGE, // sgei
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&JitCompiler::Compile_SLT, // slti
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@ -347,6 +347,39 @@ void JitCompiler::Compile_DP4(Instruction instr) {
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Compile_DestEnable(instr, SRC1);
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}
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void JitCompiler::Compile_DPH(Instruction instr) {
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if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::DPHI) {
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Compile_SwizzleSrc(instr, 1, instr.common.src1i, SRC1);
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Compile_SwizzleSrc(instr, 2, instr.common.src2i, SRC2);
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} else {
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Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
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Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
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}
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if (Common::GetCPUCaps().sse4_1) {
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// Set 4th component to 1.0
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BLENDPS(SRC1, R(ONE), 0x8); // 0b1000
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DPPS(SRC1, R(SRC2), 0xff);
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} else {
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// Reverse to set the 4th component to 1.0
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SHUFPS(SRC1, R(SRC1), _MM_SHUFFLE(0, 1, 2, 3));
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MOVSS(SRC1, R(ONE));
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SHUFPS(SRC1, R(SRC1), _MM_SHUFFLE(0, 1, 2, 3));
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MULPS(SRC1, R(SRC2));
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MOVAPS(SRC2, R(SRC1));
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SHUFPS(SRC1, R(SRC1), _MM_SHUFFLE(2, 3, 0, 1)); // XYZW -> ZWXY
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ADDPS(SRC1, R(SRC2));
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MOVAPS(SRC2, R(SRC1));
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SHUFPS(SRC1, R(SRC1), _MM_SHUFFLE(0, 1, 2, 3)); // XYZW -> WZYX
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ADDPS(SRC1, R(SRC2));
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}
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Compile_DestEnable(instr, SRC1);
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}
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void JitCompiler::Compile_EX2(Instruction instr) {
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Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
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MOVSS(XMM0, R(SRC1));
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