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@ -1225,36 +1225,15 @@ struct Regs {
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// Offset to shader program entry point (in words)
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BitField<0, 16, u32> main_offset;
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union {
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BitField<0, 4, u64> attribute0_register;
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BitField<4, 4, u64> attribute1_register;
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BitField<8, 4, u64> attribute2_register;
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BitField<12, 4, u64> attribute3_register;
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BitField<16, 4, u64> attribute4_register;
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BitField<20, 4, u64> attribute5_register;
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BitField<24, 4, u64> attribute6_register;
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BitField<28, 4, u64> attribute7_register;
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BitField<32, 4, u64> attribute8_register;
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BitField<36, 4, u64> attribute9_register;
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BitField<40, 4, u64> attribute10_register;
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BitField<44, 4, u64> attribute11_register;
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BitField<48, 4, u64> attribute12_register;
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BitField<52, 4, u64> attribute13_register;
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BitField<56, 4, u64> attribute14_register;
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BitField<60, 4, u64> attribute15_register;
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/// Maps input attributes to registers. 4-bits per attribute, specifying a register index
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u32 input_attribute_to_register_map_low;
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u32 input_attribute_to_register_map_high;
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int GetRegisterForAttribute(int attribute_index) const {
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u64 fields[] = {
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attribute0_register, attribute1_register, attribute2_register,
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attribute3_register, attribute4_register, attribute5_register,
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attribute6_register, attribute7_register, attribute8_register,
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attribute9_register, attribute10_register, attribute11_register,
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attribute12_register, attribute13_register, attribute14_register,
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attribute15_register,
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};
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return (int)fields[attribute_index];
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}
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} input_register_map;
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unsigned int GetRegisterForAttribute(unsigned int attribute_index) const {
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u64 map = ((u64)input_attribute_to_register_map_high << 32) |
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(u64)input_attribute_to_register_map_low;
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return (map >> (attribute_index * 4)) & 0b1111;
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}
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BitField<0, 16, u32> output_mask;
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