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@ -21,7 +21,8 @@ namespace Pica {
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namespace Shader {
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void RunInterpreter(UnitState& state) {
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template<bool Debug>
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void RunInterpreter(UnitState<Debug>& state) {
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const auto& uniforms = g_state.vs.uniforms;
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const auto& swizzle_data = g_state.vs.swizzle_data;
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const auto& program_code = g_state.vs.program_code;
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@ -29,7 +30,9 @@ void RunInterpreter(UnitState& state) {
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// Placeholder for invalid inputs
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static float24 dummy_vec4_float24[4];
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while (true) {
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unsigned iteration = 0;
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bool exit_loop = false;
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while (!exit_loop) {
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if (!state.call_stack.empty()) {
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auto& top = state.call_stack.back();
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if (state.program_counter == top.final_address) {
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@ -47,16 +50,19 @@ void RunInterpreter(UnitState& state) {
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}
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}
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bool exit_loop = false;
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const Instruction instr = { program_code[state.program_counter] };
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const SwizzlePattern swizzle = { swizzle_data[instr.common.operand_desc_id] };
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static auto call = [](UnitState& state, u32 offset, u32 num_instructions,
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static auto call = [](UnitState<Debug>& state, u32 offset, u32 num_instructions,
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u32 return_offset, u8 repeat_count, u8 loop_increment) {
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state.program_counter = offset - 1; // -1 to make sure when incrementing the PC we end up at the correct offset
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ASSERT(state.call_stack.size() < state.call_stack.capacity());
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state.call_stack.push_back({ offset + num_instructions, return_offset, repeat_count, loop_increment, offset });
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};
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Record<DebugDataRecord::CUR_INSTR>(state.debug, iteration, state.program_counter);
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if (iteration > 0)
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Record<DebugDataRecord::NEXT_INSTR>(state.debug, iteration - 1, state.program_counter);
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state.debug.max_offset = std::max<u32>(state.debug.max_offset, 1 + state.program_counter);
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auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const float24* {
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@ -123,58 +129,78 @@ void RunInterpreter(UnitState& state) {
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switch (instr.opcode.Value().EffectiveOpCode()) {
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case OpCode::Id::ADD:
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{
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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dest[i] = src1[i] + src2[i];
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}
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Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
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break;
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}
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case OpCode::Id::MUL:
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{
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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dest[i] = src1[i] * src2[i];
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}
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Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
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break;
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}
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case OpCode::Id::FLR:
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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dest[i] = float24::FromFloat32(std::floor(src1[i].ToFloat32()));
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}
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Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
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break;
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case OpCode::Id::MAX:
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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dest[i] = std::max(src1[i], src2[i]);
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}
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Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
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break;
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case OpCode::Id::MIN:
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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dest[i] = std::min(src1[i], src2[i]);
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}
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Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
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break;
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case OpCode::Id::DP3:
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case OpCode::Id::DP4:
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{
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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float24 dot = float24::FromFloat32(0.f);
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int num_components = (instr.opcode.Value() == OpCode::Id::DP3) ? 3 : 4;
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for (int i = 0; i < num_components; ++i)
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@ -186,12 +212,15 @@ void RunInterpreter(UnitState& state) {
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dest[i] = dot;
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}
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Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
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break;
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}
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// Reciprocal
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case OpCode::Id::RCP:
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{
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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@ -200,13 +229,15 @@ void RunInterpreter(UnitState& state) {
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// TODO: I think this might be wrong... we should only use one component here
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dest[i] = float24::FromFloat32(1.0f / src1[i].ToFloat32());
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}
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Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
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break;
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}
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// Reciprocal Square Root
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case OpCode::Id::RSQ:
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{
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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@ -215,12 +246,13 @@ void RunInterpreter(UnitState& state) {
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// TODO: I think this might be wrong... we should only use one component here
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dest[i] = float24::FromFloat32(1.0f / sqrt(src1[i].ToFloat32()));
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}
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Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
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break;
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}
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case OpCode::Id::MOVA:
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{
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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for (int i = 0; i < 2; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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@ -228,32 +260,41 @@ void RunInterpreter(UnitState& state) {
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// TODO: Figure out how the rounding is done on hardware
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state.address_registers[i] = static_cast<s32>(src1[i].ToFloat32());
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}
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Record<DebugDataRecord::ADDR_REG_OUT>(state.debug, iteration, state.address_registers);
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break;
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}
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case OpCode::Id::MOV:
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{
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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dest[i] = src1[i];
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}
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Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
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break;
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}
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case OpCode::Id::SLT:
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case OpCode::Id::SLTI:
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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dest[i] = (src1[i] < src2[i]) ? float24::FromFloat32(1.0f) : float24::FromFloat32(0.0f);
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}
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Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
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break;
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case OpCode::Id::CMP:
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
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for (int i = 0; i < 2; ++i) {
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// TODO: Can you restrict to one compare via dest masking?
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@ -261,27 +302,27 @@ void RunInterpreter(UnitState& state) {
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auto op = (i == 0) ? compare_op.x.Value() : compare_op.y.Value();
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switch (op) {
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case compare_op.Equal:
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case Instruction::Common::CompareOpType::Equal:
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state.conditional_code[i] = (src1[i] == src2[i]);
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break;
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case compare_op.NotEqual:
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case Instruction::Common::CompareOpType::NotEqual:
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state.conditional_code[i] = (src1[i] != src2[i]);
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break;
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case compare_op.LessThan:
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case Instruction::Common::CompareOpType::LessThan:
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state.conditional_code[i] = (src1[i] < src2[i]);
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break;
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case compare_op.LessEqual:
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case Instruction::Common::CompareOpType::LessEqual:
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state.conditional_code[i] = (src1[i] <= src2[i]);
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break;
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case compare_op.GreaterThan:
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case Instruction::Common::CompareOpType::GreaterThan:
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state.conditional_code[i] = (src1[i] > src2[i]);
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break;
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case compare_op.GreaterEqual:
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case Instruction::Common::CompareOpType::GreaterEqual:
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state.conditional_code[i] = (src1[i] >= src2[i]);
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break;
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@ -290,6 +331,7 @@ void RunInterpreter(UnitState& state) {
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break;
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}
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}
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Record<DebugDataRecord::CMP_RESULT>(state.debug, iteration, state.conditional_code);
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break;
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default:
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@ -359,12 +401,17 @@ void RunInterpreter(UnitState& state) {
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: (instr.mad.dest.Value() < 0x20) ? &state.registers.temporary[instr.mad.dest.Value().GetIndex()][0]
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: dummy_vec4_float24;
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Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
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Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
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Record<DebugDataRecord::SRC3>(state.debug, iteration, src3);
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Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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dest[i] = src1[i] * src2[i] + src3[i];
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}
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Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
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} else {
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LOG_ERROR(HW_GPU, "Unhandled multiply-add instruction: 0x%02x (%s): 0x%08x",
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(int)instr.opcode.Value().EffectiveOpCode(), instr.opcode.Value().GetInfo().name, instr.hex);
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@ -374,7 +421,7 @@ void RunInterpreter(UnitState& state) {
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default:
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{
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static auto evaluate_condition = [](const UnitState& state, bool refx, bool refy, Instruction::FlowControlType flow_control) {
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static auto evaluate_condition = [](const UnitState<Debug>& state, bool refx, bool refy, Instruction::FlowControlType flow_control) {
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bool results[2] = { refx == state.conditional_code[0],
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refy == state.conditional_code[1] };
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@ -400,12 +447,14 @@ void RunInterpreter(UnitState& state) {
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break;
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case OpCode::Id::JMPC:
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Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration, state.conditional_code);
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if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
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state.program_counter = instr.flow_control.dest_offset - 1;
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}
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break;
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case OpCode::Id::JMPU:
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Record<DebugDataRecord::COND_BOOL_IN>(state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
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if (uniforms.b[instr.flow_control.bool_uniform_id]) {
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state.program_counter = instr.flow_control.dest_offset - 1;
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}
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@ -419,6 +468,7 @@ void RunInterpreter(UnitState& state) {
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break;
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case OpCode::Id::CALLU:
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Record<DebugDataRecord::COND_BOOL_IN>(state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
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if (uniforms.b[instr.flow_control.bool_uniform_id]) {
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call(state,
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instr.flow_control.dest_offset,
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@ -428,6 +478,7 @@ void RunInterpreter(UnitState& state) {
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break;
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case OpCode::Id::CALLC:
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Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration, state.conditional_code);
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if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
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call(state,
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instr.flow_control.dest_offset,
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@ -440,6 +491,7 @@ void RunInterpreter(UnitState& state) {
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break;
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case OpCode::Id::IFU:
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Record<DebugDataRecord::COND_BOOL_IN>(state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
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if (uniforms.b[instr.flow_control.bool_uniform_id]) {
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call(state,
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state.program_counter + 1,
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@ -458,6 +510,7 @@ void RunInterpreter(UnitState& state) {
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{
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// TODO: Do we need to consider swizzlers here?
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Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration, state.conditional_code);
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if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
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call(state,
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state.program_counter + 1,
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@ -475,14 +528,19 @@ void RunInterpreter(UnitState& state) {
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case OpCode::Id::LOOP:
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{
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state.address_registers[2] = uniforms.i[instr.flow_control.int_uniform_id].y;
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Math::Vec4<u8> loop_param(uniforms.i[instr.flow_control.int_uniform_id].x,
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uniforms.i[instr.flow_control.int_uniform_id].y,
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uniforms.i[instr.flow_control.int_uniform_id].z,
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uniforms.i[instr.flow_control.int_uniform_id].w);
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state.address_registers[2] = loop_param.y;
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Record<DebugDataRecord::LOOP_INT_IN>(state.debug, iteration, loop_param);
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call(state,
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state.program_counter + 1,
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instr.flow_control.dest_offset - state.program_counter + 1,
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instr.flow_control.dest_offset + 1,
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uniforms.i[instr.flow_control.int_uniform_id].x,
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uniforms.i[instr.flow_control.int_uniform_id].z);
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loop_param.x,
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loop_param.z);
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break;
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}
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@ -497,12 +555,14 @@ void RunInterpreter(UnitState& state) {
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}
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++state.program_counter;
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if (exit_loop)
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break;
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++iteration;
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}
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}
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// Explicit instantiation
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template void RunInterpreter(UnitState<false>& state);
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template void RunInterpreter(UnitState<true>& state);
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} // namespace
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} // namespace
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