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@ -186,13 +186,22 @@ bool HasToPreserveDepthContents(bool is_clear, const Maxwell& regs) {
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scissor.max_y < regs.zeta_height;
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}
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template <std::size_t N>
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std::array<VkDeviceSize, N> ExpandStrides(const std::array<u16, N>& strides) {
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std::array<VkDeviceSize, N> expanded;
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std::copy(strides.begin(), strides.end(), expanded.begin());
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return expanded;
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}
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} // Anonymous namespace
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class BufferBindings final {
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public:
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void AddVertexBinding(VkBuffer buffer, VkDeviceSize offset) {
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void AddVertexBinding(VkBuffer buffer, VkDeviceSize offset, VkDeviceSize size, u32 stride) {
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vertex.buffers[vertex.num_buffers] = buffer;
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vertex.offsets[vertex.num_buffers] = offset;
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vertex.sizes[vertex.num_buffers] = size;
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vertex.strides[vertex.num_buffers] = static_cast<u16>(stride);
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++vertex.num_buffers;
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}
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@ -202,76 +211,76 @@ public:
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index.type = type;
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}
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void Bind(VKScheduler& scheduler) const {
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void Bind(const VKDevice& device, VKScheduler& scheduler) const {
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// Use this large switch case to avoid dispatching more memory in the record lambda than
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// what we need. It looks horrible, but it's the best we can do on standard C++.
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switch (vertex.num_buffers) {
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case 0:
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return BindStatic<0>(scheduler);
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return BindStatic<0>(device, scheduler);
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case 1:
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return BindStatic<1>(scheduler);
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return BindStatic<1>(device, scheduler);
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case 2:
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return BindStatic<2>(scheduler);
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return BindStatic<2>(device, scheduler);
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case 3:
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return BindStatic<3>(scheduler);
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return BindStatic<3>(device, scheduler);
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case 4:
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return BindStatic<4>(scheduler);
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return BindStatic<4>(device, scheduler);
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case 5:
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return BindStatic<5>(scheduler);
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return BindStatic<5>(device, scheduler);
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case 6:
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return BindStatic<6>(scheduler);
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return BindStatic<6>(device, scheduler);
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case 7:
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return BindStatic<7>(scheduler);
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return BindStatic<7>(device, scheduler);
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case 8:
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return BindStatic<8>(scheduler);
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return BindStatic<8>(device, scheduler);
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case 9:
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return BindStatic<9>(scheduler);
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return BindStatic<9>(device, scheduler);
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case 10:
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return BindStatic<10>(scheduler);
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return BindStatic<10>(device, scheduler);
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case 11:
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return BindStatic<11>(scheduler);
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return BindStatic<11>(device, scheduler);
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case 12:
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return BindStatic<12>(scheduler);
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return BindStatic<12>(device, scheduler);
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case 13:
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return BindStatic<13>(scheduler);
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return BindStatic<13>(device, scheduler);
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case 14:
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return BindStatic<14>(scheduler);
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return BindStatic<14>(device, scheduler);
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case 15:
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return BindStatic<15>(scheduler);
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return BindStatic<15>(device, scheduler);
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case 16:
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return BindStatic<16>(scheduler);
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return BindStatic<16>(device, scheduler);
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case 17:
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return BindStatic<17>(scheduler);
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return BindStatic<17>(device, scheduler);
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case 18:
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return BindStatic<18>(scheduler);
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return BindStatic<18>(device, scheduler);
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case 19:
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return BindStatic<19>(scheduler);
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return BindStatic<19>(device, scheduler);
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case 20:
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return BindStatic<20>(scheduler);
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return BindStatic<20>(device, scheduler);
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case 21:
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return BindStatic<21>(scheduler);
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return BindStatic<21>(device, scheduler);
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case 22:
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return BindStatic<22>(scheduler);
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return BindStatic<22>(device, scheduler);
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case 23:
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return BindStatic<23>(scheduler);
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return BindStatic<23>(device, scheduler);
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case 24:
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return BindStatic<24>(scheduler);
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return BindStatic<24>(device, scheduler);
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case 25:
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return BindStatic<25>(scheduler);
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return BindStatic<25>(device, scheduler);
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case 26:
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return BindStatic<26>(scheduler);
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return BindStatic<26>(device, scheduler);
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case 27:
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return BindStatic<27>(scheduler);
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return BindStatic<27>(device, scheduler);
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case 28:
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return BindStatic<28>(scheduler);
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return BindStatic<28>(device, scheduler);
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case 29:
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return BindStatic<29>(scheduler);
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return BindStatic<29>(device, scheduler);
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case 30:
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return BindStatic<30>(scheduler);
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return BindStatic<30>(device, scheduler);
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case 31:
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return BindStatic<31>(scheduler);
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return BindStatic<31>(device, scheduler);
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case 32:
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return BindStatic<32>(scheduler);
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return BindStatic<32>(device, scheduler);
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}
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UNREACHABLE();
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}
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@ -282,6 +291,8 @@ private:
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std::size_t num_buffers = 0;
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std::array<VkBuffer, Maxwell::NumVertexArrays> buffers;
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std::array<VkDeviceSize, Maxwell::NumVertexArrays> offsets;
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std::array<VkDeviceSize, Maxwell::NumVertexArrays> sizes;
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std::array<u16, Maxwell::NumVertexArrays> strides;
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} vertex;
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struct {
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@ -291,15 +302,23 @@ private:
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} index;
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template <std::size_t N>
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void BindStatic(VKScheduler& scheduler) const {
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if (index.buffer) {
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BindStatic<N, true>(scheduler);
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void BindStatic(const VKDevice& device, VKScheduler& scheduler) const {
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if (device.IsExtExtendedDynamicStateSupported()) {
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if (index.buffer) {
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BindStatic<N, true, true>(scheduler);
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} else {
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BindStatic<N, false, true>(scheduler);
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}
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} else {
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BindStatic<N, false>(scheduler);
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if (index.buffer) {
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BindStatic<N, true, false>(scheduler);
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} else {
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BindStatic<N, false, false>(scheduler);
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}
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}
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}
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template <std::size_t N, bool is_indexed>
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template <std::size_t N, bool is_indexed, bool has_extended_dynamic_state>
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void BindStatic(VKScheduler& scheduler) const {
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static_assert(N <= Maxwell::NumVertexArrays);
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if constexpr (N == 0) {
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@ -311,6 +330,31 @@ private:
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std::copy(vertex.buffers.begin(), vertex.buffers.begin() + N, buffers.begin());
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std::copy(vertex.offsets.begin(), vertex.offsets.begin() + N, offsets.begin());
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if constexpr (has_extended_dynamic_state) {
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// With extended dynamic states we can specify the length and stride of a vertex buffer
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// std::array<VkDeviceSize, N> sizes;
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std::array<u16, N> strides;
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// std::copy(vertex.sizes.begin(), vertex.sizes.begin() + N, sizes.begin());
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std::copy(vertex.strides.begin(), vertex.strides.begin() + N, strides.begin());
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if constexpr (is_indexed) {
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scheduler.Record(
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[buffers, offsets, strides, index = index](vk::CommandBuffer cmdbuf) {
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cmdbuf.BindIndexBuffer(index.buffer, index.offset, index.type);
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cmdbuf.BindVertexBuffers2EXT(0, static_cast<u32>(N), buffers.data(),
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offsets.data(), nullptr,
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ExpandStrides(strides).data());
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});
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} else {
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scheduler.Record([buffers, offsets, strides](vk::CommandBuffer cmdbuf) {
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cmdbuf.BindVertexBuffers2EXT(0, static_cast<u32>(N), buffers.data(),
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offsets.data(), nullptr,
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ExpandStrides(strides).data());
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});
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}
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return;
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}
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if constexpr (is_indexed) {
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// Indexed draw
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scheduler.Record([buffers, offsets, index = index](vk::CommandBuffer cmdbuf) {
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@ -369,7 +413,7 @@ void RasterizerVulkan::Draw(bool is_indexed, bool is_instanced) {
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const auto& gpu = system.GPU().Maxwell3D();
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GraphicsPipelineCacheKey key;
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key.fixed_state.Fill(gpu.regs);
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key.fixed_state.Fill(gpu.regs, device.IsExtExtendedDynamicStateSupported());
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buffer_cache.Map(CalculateGraphicsStreamBufferSize(is_indexed));
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@ -402,7 +446,7 @@ void RasterizerVulkan::Draw(bool is_indexed, bool is_instanced) {
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UpdateDynamicStates();
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buffer_bindings.Bind(scheduler);
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buffer_bindings.Bind(device, scheduler);
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BeginTransformFeedback();
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@ -822,7 +866,7 @@ RasterizerVulkan::DrawParameters RasterizerVulkan::SetupGeometry(FixedPipelineSt
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const auto& gpu = system.GPU().Maxwell3D();
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const auto& regs = gpu.regs;
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SetupVertexArrays(fixed_state.vertex_input, buffer_bindings);
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SetupVertexArrays(buffer_bindings);
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const u32 base_instance = regs.vb_base_instance;
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const u32 num_instances = is_instanced ? gpu.mme_draw.instance_count : 1;
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@ -893,6 +937,17 @@ void RasterizerVulkan::UpdateDynamicStates() {
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UpdateBlendConstants(regs);
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UpdateDepthBounds(regs);
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UpdateStencilFaces(regs);
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if (device.IsExtExtendedDynamicStateSupported()) {
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UpdateCullMode(regs);
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UpdateDepthBoundsTestEnable(regs);
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UpdateDepthTestEnable(regs);
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UpdateDepthWriteEnable(regs);
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UpdateDepthCompareOp(regs);
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UpdateFrontFace(regs);
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UpdatePrimitiveTopology(regs);
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UpdateStencilOp(regs);
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UpdateStencilTestEnable(regs);
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}
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}
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void RasterizerVulkan::BeginTransformFeedback() {
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@ -940,41 +995,25 @@ void RasterizerVulkan::EndTransformFeedback() {
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[](vk::CommandBuffer cmdbuf) { cmdbuf.EndTransformFeedbackEXT(0, 0, nullptr, nullptr); });
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}
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void RasterizerVulkan::SetupVertexArrays(FixedPipelineState::VertexInput& vertex_input,
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BufferBindings& buffer_bindings) {
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void RasterizerVulkan::SetupVertexArrays(BufferBindings& buffer_bindings) {
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const auto& regs = system.GPU().Maxwell3D().regs;
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for (std::size_t index = 0; index < Maxwell::NumVertexAttributes; ++index) {
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const auto& attrib = regs.vertex_attrib_format[index];
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if (attrib.IsConstant()) {
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vertex_input.SetAttribute(index, false, 0, 0, {}, {});
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continue;
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}
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vertex_input.SetAttribute(index, true, attrib.buffer, attrib.offset, attrib.type.Value(),
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attrib.size.Value());
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}
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for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
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const auto& vertex_array = regs.vertex_array[index];
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if (!vertex_array.IsEnabled()) {
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vertex_input.SetBinding(index, false, 0, 0);
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continue;
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}
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|
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vertex_input.SetBinding(
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index, true, vertex_array.stride,
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regs.instanced_arrays.IsInstancingEnabled(index) ? vertex_array.divisor : 0);
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const GPUVAddr start{vertex_array.StartAddress()};
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const GPUVAddr end{regs.vertex_array_limit[index].LimitAddress()};
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ASSERT(end >= start);
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const std::size_t size{end - start};
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const std::size_t size = end - start;
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|
|
if (size == 0) {
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|
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buffer_bindings.AddVertexBinding(DefaultBuffer(), 0);
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|
|
buffer_bindings.AddVertexBinding(DefaultBuffer(), 0, DEFAULT_BUFFER_SIZE, 0);
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continue;
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}
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|
|
const auto info = buffer_cache.UploadMemory(start, size);
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|
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buffer_bindings.AddVertexBinding(info.handle, info.offset);
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buffer_bindings.AddVertexBinding(info.handle, info.offset, size, vertex_array.stride);
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}
|
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}
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|
@ -1326,6 +1365,117 @@ void RasterizerVulkan::UpdateStencilFaces(Tegra::Engines::Maxwell3D::Regs& regs)
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}
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}
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|
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void RasterizerVulkan::UpdateCullMode(Tegra::Engines::Maxwell3D::Regs& regs) {
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|
|
if (!state_tracker.TouchCullMode()) {
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|
|
return;
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|
|
}
|
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|
|
|
scheduler.Record(
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|
|
[enabled = regs.cull_test_enabled, cull_face = regs.cull_face](vk::CommandBuffer cmdbuf) {
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|
|
cmdbuf.SetCullModeEXT(enabled ? MaxwellToVK::CullFace(cull_face) : VK_CULL_MODE_NONE);
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});
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}
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void RasterizerVulkan::UpdateDepthBoundsTestEnable(Tegra::Engines::Maxwell3D::Regs& regs) {
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if (!state_tracker.TouchDepthBoundsTestEnable()) {
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return;
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}
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scheduler.Record([enable = regs.depth_bounds_enable](vk::CommandBuffer cmdbuf) {
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cmdbuf.SetDepthBoundsTestEnableEXT(enable);
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});
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}
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void RasterizerVulkan::UpdateDepthTestEnable(Tegra::Engines::Maxwell3D::Regs& regs) {
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if (!state_tracker.TouchDepthTestEnable()) {
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return;
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}
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scheduler.Record([enable = regs.depth_test_enable](vk::CommandBuffer cmdbuf) {
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cmdbuf.SetDepthTestEnableEXT(enable);
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});
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}
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void RasterizerVulkan::UpdateDepthWriteEnable(Tegra::Engines::Maxwell3D::Regs& regs) {
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if (!state_tracker.TouchDepthWriteEnable()) {
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return;
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}
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scheduler.Record([enable = regs.depth_write_enabled](vk::CommandBuffer cmdbuf) {
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cmdbuf.SetDepthWriteEnableEXT(enable);
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});
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}
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void RasterizerVulkan::UpdateDepthCompareOp(Tegra::Engines::Maxwell3D::Regs& regs) {
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if (!state_tracker.TouchDepthCompareOp()) {
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return;
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}
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scheduler.Record([func = regs.depth_test_func](vk::CommandBuffer cmdbuf) {
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cmdbuf.SetDepthCompareOpEXT(MaxwellToVK::ComparisonOp(func));
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});
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}
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void RasterizerVulkan::UpdateFrontFace(Tegra::Engines::Maxwell3D::Regs& regs) {
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if (!state_tracker.TouchFrontFace()) {
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|
return;
|
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}
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VkFrontFace front_face = MaxwellToVK::FrontFace(regs.front_face);
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if (regs.screen_y_control.triangle_rast_flip != 0) {
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front_face = front_face == VK_FRONT_FACE_CLOCKWISE ? VK_FRONT_FACE_COUNTER_CLOCKWISE
|
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: VK_FRONT_FACE_CLOCKWISE;
|
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|
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}
|
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|
|
scheduler.Record(
|
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|
|
[front_face](vk::CommandBuffer cmdbuf) { cmdbuf.SetFrontFaceEXT(front_face); });
|
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|
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}
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void RasterizerVulkan::UpdatePrimitiveTopology(Tegra::Engines::Maxwell3D::Regs& regs) {
|
|
|
|
|
if (!state_tracker.TouchPrimitiveTopology()) {
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
const Maxwell::PrimitiveTopology primitive_topology = regs.draw.topology.Value();
|
|
|
|
|
scheduler.Record([this, primitive_topology](vk::CommandBuffer cmdbuf) {
|
|
|
|
|
cmdbuf.SetPrimitiveTopologyEXT(MaxwellToVK::PrimitiveTopology(device, primitive_topology));
|
|
|
|
|
});
|
|
|
|
|
}
|
|
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|
|
|
|
|
|
|
void RasterizerVulkan::UpdateStencilOp(Tegra::Engines::Maxwell3D::Regs& regs) {
|
|
|
|
|
if (!state_tracker.TouchStencilOp()) {
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
const Maxwell::StencilOp fail = regs.stencil_front_op_fail;
|
|
|
|
|
const Maxwell::StencilOp zfail = regs.stencil_front_op_zfail;
|
|
|
|
|
const Maxwell::StencilOp zpass = regs.stencil_front_op_zpass;
|
|
|
|
|
const Maxwell::ComparisonOp compare = regs.stencil_front_func_func;
|
|
|
|
|
if (regs.stencil_two_side_enable) {
|
|
|
|
|
scheduler.Record([fail, zfail, zpass, compare](vk::CommandBuffer cmdbuf) {
|
|
|
|
|
cmdbuf.SetStencilOpEXT(VK_STENCIL_FACE_FRONT_AND_BACK, MaxwellToVK::StencilOp(fail),
|
|
|
|
|
MaxwellToVK::StencilOp(zpass), MaxwellToVK::StencilOp(zfail),
|
|
|
|
|
MaxwellToVK::ComparisonOp(compare));
|
|
|
|
|
});
|
|
|
|
|
} else {
|
|
|
|
|
const Maxwell::StencilOp back_fail = regs.stencil_back_op_fail;
|
|
|
|
|
const Maxwell::StencilOp back_zfail = regs.stencil_back_op_zfail;
|
|
|
|
|
const Maxwell::StencilOp back_zpass = regs.stencil_back_op_zpass;
|
|
|
|
|
const Maxwell::ComparisonOp back_compare = regs.stencil_back_func_func;
|
|
|
|
|
scheduler.Record([fail, zfail, zpass, compare, back_fail, back_zfail, back_zpass,
|
|
|
|
|
back_compare](vk::CommandBuffer cmdbuf) {
|
|
|
|
|
cmdbuf.SetStencilOpEXT(VK_STENCIL_FACE_FRONT_BIT, MaxwellToVK::StencilOp(fail),
|
|
|
|
|
MaxwellToVK::StencilOp(zpass), MaxwellToVK::StencilOp(zfail),
|
|
|
|
|
MaxwellToVK::ComparisonOp(compare));
|
|
|
|
|
cmdbuf.SetStencilOpEXT(VK_STENCIL_FACE_BACK_BIT, MaxwellToVK::StencilOp(back_fail),
|
|
|
|
|
MaxwellToVK::StencilOp(back_zpass),
|
|
|
|
|
MaxwellToVK::StencilOp(back_zfail),
|
|
|
|
|
MaxwellToVK::ComparisonOp(back_compare));
|
|
|
|
|
});
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void RasterizerVulkan::UpdateStencilTestEnable(Tegra::Engines::Maxwell3D::Regs& regs) {
|
|
|
|
|
if (!state_tracker.TouchStencilTestEnable()) {
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
scheduler.Record([enable = regs.stencil_enable](vk::CommandBuffer cmdbuf) {
|
|
|
|
|
cmdbuf.SetStencilTestEnableEXT(enable);
|
|
|
|
|
});
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
std::size_t RasterizerVulkan::CalculateGraphicsStreamBufferSize(bool is_indexed) const {
|
|
|
|
|
std::size_t size = CalculateVertexArraysSize();
|
|
|
|
|
if (is_indexed) {
|
|
|
|
|