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@ -17,32 +17,34 @@ u32 ShaderIR::DecodeBfe(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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UNIMPLEMENTED_IF(instr.bfe.negate_b);
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Node op_a = GetRegister(instr.gpr8);
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op_a = GetOperandAbsNegInteger(op_a, false, instr.bfe.negate_a, false);
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Node op_b = [&] {
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switch (opcode->get().GetId()) {
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case OpCode::Id::BFE_R:
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return GetRegister(instr.gpr20);
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case OpCode::Id::BFE_C:
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return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
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case OpCode::Id::BFE_IMM:
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return Immediate(instr.alu.GetSignedImm20_20());
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default:
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UNREACHABLE();
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return Immediate(0);
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}
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}();
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switch (opcode->get().GetId()) {
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case OpCode::Id::BFE_IMM: {
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UNIMPLEMENTED_IF_MSG(instr.generates_cc,
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"Condition codes generation in BFE is not implemented");
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UNIMPLEMENTED_IF_MSG(instr.bfe.rd_cc, "Condition codes in BFE is not implemented");
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UNIMPLEMENTED_IF_MSG(instr.bfe.brev, "BREV in BFE is not implemented");
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const Node inner_shift_imm = Immediate(static_cast<u32>(instr.bfe.GetLeftShiftValue()));
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const Node outer_shift_imm =
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Immediate(static_cast<u32>(instr.bfe.GetLeftShiftValue() + instr.bfe.shift_position));
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const bool is_signed = instr.bfe.is_signed;
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const Node inner_shift =
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Operation(OperationCode::ILogicalShiftLeft, NO_PRECISE, op_a, inner_shift_imm);
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const Node outer_shift =
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Operation(OperationCode::ILogicalShiftRight, NO_PRECISE, inner_shift, outer_shift_imm);
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const auto start_position = SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_b,
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Immediate(0), Immediate(8));
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const auto bits = SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_b,
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Immediate(8), Immediate(8));
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SetInternalFlagsFromInteger(bb, outer_shift, instr.generates_cc);
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SetRegister(bb, instr.gpr0, outer_shift);
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break;
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}
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default:
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UNIMPLEMENTED_MSG("Unhandled BFE instruction: {}", opcode->get().GetName());
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}
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auto result =
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SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_a, start_position, bits);
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SetRegister(bb, instr.gpr0, result);
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return pc;
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}
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