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GPU: Support changing the texture swizzles for Maxwell textures.

master
Subv 2018-06-06 18:28:09 +07:00
parent 89e81a9be2
commit 47629c89a8
3 changed files with 45 additions and 0 deletions
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8
src/video_core/renderer_opengl/gl_rasterizer.cpp
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@ -681,6 +681,14 @@ u32 RasterizerOpenGL::SetupTextures(Maxwell::ShaderStage stage, GLuint program,
Surface surface = res_cache.GetTextureSurface(texture);
if (surface != nullptr) {
state.texture_units[current_bindpoint].texture_2d = surface->texture.handle;
state.texture_units[current_bindpoint].swizzle.r =
MaxwellToGL::SwizzleSource(texture.tic.x_source);
state.texture_units[current_bindpoint].swizzle.g =
MaxwellToGL::SwizzleSource(texture.tic.y_source);
state.texture_units[current_bindpoint].swizzle.b =
MaxwellToGL::SwizzleSource(texture.tic.z_source);
state.texture_units[current_bindpoint].swizzle.a =
MaxwellToGL::SwizzleSource(texture.tic.w_source);
} else {
// Can occur when texture addr is null or its memory is unmapped/invalid
state.texture_units[current_bindpoint].texture_2d = 0;

21
src/video_core/renderer_opengl/maxwell_to_gl.h
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@ -180,4 +180,25 @@ inline GLenum BlendFunc(Maxwell::Blend::Factor factor) {
return {};
}
inline GLenum SwizzleSource(Tegra::Texture::SwizzleSource source) {
switch (source) {
case Tegra::Texture::SwizzleSource::Zero:
return GL_ZERO;
case Tegra::Texture::SwizzleSource::R:
return GL_RED;
case Tegra::Texture::SwizzleSource::G:
return GL_GREEN;
case Tegra::Texture::SwizzleSource::B:
return GL_BLUE;
case Tegra::Texture::SwizzleSource::A:
return GL_ALPHA;
case Tegra::Texture::SwizzleSource::OneInt:
case Tegra::Texture::SwizzleSource::OneFloat:
return GL_ONE;
}
NGLOG_CRITICAL(Render_OpenGL, "Unimplemented swizzle source={}", static_cast<u32>(source));
UNREACHABLE();
return {};
}
} // namespace MaxwellToGL

16
src/video_core/textures/texture.h
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@ -122,6 +122,17 @@ enum class ComponentType : u32 {
FLOAT = 7
};
enum class SwizzleSource : u32 {
Zero = 0,
R = 2,
G = 3,
B = 4,
A = 5,
OneInt = 6,
OneFloat = 7,
};
union TextureHandle {
u32 raw;
BitField<0, 20, u32> tic_id;
@ -139,6 +150,11 @@ struct TICEntry {
BitField<10, 3, ComponentType> g_type;
BitField<13, 3, ComponentType> b_type;
BitField<16, 3, ComponentType> a_type;
BitField<19, 3, SwizzleSource> x_source;
BitField<22, 3, SwizzleSource> y_source;
BitField<25, 3, SwizzleSource> z_source;
BitField<28, 3, SwizzleSource> w_source;
};
u32 address_low;
union {