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@ -5877,6 +5877,8 @@ L_stm_s_takeabort:
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state->Cpsr &= ~(1 << 18);
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state->Cpsr &= ~(1 << 19);
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}
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ARMul_CPSRAltered(state);
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return 1;
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}
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// SADD8/SSUB8
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@ -5948,6 +5950,7 @@ L_stm_s_takeabort:
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state->Cpsr &= ~(1 << 19);
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}
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ARMul_CPSRAltered(state);
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state->Reg[rd_idx] = (lo_val1 | lo_val2 << 8 | hi_val1 << 16 | hi_val2 << 24);
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return 1;
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}
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@ -6024,15 +6027,33 @@ L_stm_s_takeabort:
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if ((instr & 0x0F0) == 0x070) { // USUB16
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h1 = ((u16)from - (u16)to);
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h2 = ((u16)(from >> 16) - (u16)(to >> 16));
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if (!(h1 & 0xffff0000)) state->Cpsr |= (3 << 16);
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if (!(h2 & 0xffff0000)) state->Cpsr |= (3 << 18);
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if (!(h1 & 0xffff0000))
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state->Cpsr |= (3 << 16);
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else
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state->Cpsr &= ~(3 << 16);
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if (!(h2 & 0xffff0000))
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state->Cpsr |= (3 << 18);
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else
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state->Cpsr &= ~(3 << 18);
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}
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else { // UADD16
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h1 = ((u16)from + (u16)to);
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h2 = ((u16)(from >> 16) + (u16)(to >> 16));
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if (h1 & 0xffff0000) state->Cpsr |= (3 << 16);
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if (h2 & 0xffff0000) state->Cpsr |= (3 << 18);
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if (h1 & 0xffff0000)
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state->Cpsr |= (3 << 16);
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else
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state->Cpsr &= ~(3 << 16);
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if (h2 & 0xffff0000)
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state->Cpsr |= (3 << 18);
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else
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state->Cpsr &= ~(3 << 18);
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}
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ARMul_CPSRAltered(state);
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state->Reg[rd] = (u32)((h1 & 0xffff) | ((h2 & 0xffff) << 16));
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return 1;
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}
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@ -6045,10 +6066,26 @@ L_stm_s_takeabort:
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b2 = ((u8)(from >> 8) - (u8)(to >> 8));
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b3 = ((u8)(from >> 16) - (u8)(to >> 16));
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b4 = ((u8)(from >> 24) - (u8)(to >> 24));
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if (!(b1 & 0xffffff00)) state->Cpsr |= (1 << 16);
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if (!(b2 & 0xffffff00)) state->Cpsr |= (1 << 17);
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if (!(b3 & 0xffffff00)) state->Cpsr |= (1 << 18);
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if (!(b4 & 0xffffff00)) state->Cpsr |= (1 << 19);
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if (!(b1 & 0xffffff00))
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state->Cpsr |= (1 << 16);
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else
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state->Cpsr &= ~(1 << 16);
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if (!(b2 & 0xffffff00))
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state->Cpsr |= (1 << 17);
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else
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state->Cpsr &= ~(1 << 17);
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if (!(b3 & 0xffffff00))
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state->Cpsr |= (1 << 18);
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else
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state->Cpsr &= ~(1 << 18);
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if (!(b4 & 0xffffff00))
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state->Cpsr |= (1 << 19);
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else
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state->Cpsr &= ~(1 << 19);
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}
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else { // UADD8
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b1 = ((u8)from + (u8)to);
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@ -6071,13 +6108,13 @@ L_stm_s_takeabort:
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else
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state->Cpsr &= ~(1 << 18);
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if (b4 & 0xffffff00)
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state->Cpsr |= (1 << 19);
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else
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state->Cpsr &= ~(1 << 19);
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}
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ARMul_CPSRAltered(state);
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state->Reg[rd] = (u32)(b1 | (b2 & 0xff) << 8 | (b3 & 0xff) << 16 | (b4 & 0xff) << 24);
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return 1;
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}
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@ -6116,7 +6153,7 @@ L_stm_s_takeabort:
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u32 rm = (instr >> 0) & 0xF;
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u32 from = state->Reg[rn];
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u32 to = state->Reg[rm];
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u32 cpsr = state->Cpsr;
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u32 cpsr = ARMul_GetCPSR(state);
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if ((instr & 0xFF0) == 0xFB0) { // SEL
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u32 result;
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if (cpsr & (1 << 16))
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@ -6172,16 +6209,23 @@ L_stm_s_takeabort:
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s16 rn_lo = (state->Reg[rn_idx]);
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s16 rn_hi = (state->Reg[rn_idx] >> 16);
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if (rn_lo > max)
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if (rn_lo > max) {
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rn_lo = max;
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else if (rn_lo < min)
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state->Cpsr |= (1 << 27);
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} else if (rn_lo < min) {
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rn_lo = min;
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state->Cpsr |= (1 << 27);
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}
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if (rn_hi > max)
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if (rn_hi > max) {
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rn_hi = max;
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else if (rn_hi < min)
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state->Cpsr |= (1 << 27);
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} else if (rn_hi < min) {
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rn_hi = min;
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state->Cpsr |= (1 << 27);
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}
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ARMul_CPSRAltered(state);
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state->Reg[rd_idx] = (rn_lo & 0xFFFF) | ((rn_hi & 0xFFFF) << 16);
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return 1;
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}
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@ -6313,16 +6357,23 @@ L_stm_s_takeabort:
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s16 rn_lo = (state->Reg[rn_idx]);
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s16 rn_hi = (state->Reg[rn_idx] >> 16);
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if (max < rn_lo)
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if (max < rn_lo) {
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rn_lo = max;
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else if (rn_lo < 0)
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state->Cpsr |= (1 << 27);
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} else if (rn_lo < 0) {
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rn_lo = 0;
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state->Cpsr |= (1 << 27);
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}
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if (max < rn_hi)
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if (max < rn_hi) {
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rn_hi = max;
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else if (rn_hi < 0)
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state->Cpsr |= (1 << 27);
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} else if (rn_hi < 0) {
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rn_hi = 0;
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state->Cpsr |= (1 << 27);
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}
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ARMul_CPSRAltered(state);
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state->Reg[rd_idx] = (rn_lo & 0xFFFF) | ((rn_hi << 16) & 0xFFFF);
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return 1;
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}
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