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@ -157,6 +157,8 @@ class XEmitter;
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// RIP addressing does not benefit from micro op fusion on Core arch
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struct OpArg
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{
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friend class XEmitter;
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OpArg() {} // dummy op arg, used for storage
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OpArg(u64 _offset, int _scale, X64Reg rmReg = RAX, X64Reg scaledReg = RAX)
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{
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@ -176,9 +178,6 @@ struct OpArg
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void WriteVex(XEmitter* emit, X64Reg regOp1, X64Reg regOp2, int L, int pp, int mmmmm, int W = 0) const;
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void WriteRest(XEmitter *emit, int extraBytes=0, X64Reg operandReg=INVALID_REG, bool warn_64bit_offset = true) const;
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void WriteSingleByteOp(XEmitter *emit, u8 op, X64Reg operandReg, int bits);
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// This one is public - must be written to
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u64 offset; // use RIP-relative as much as possible - 64-bit immediates are not available.
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u16 operandReg;
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void WriteNormalOp(XEmitter *emit, bool toRM, NormalOp op, const OpArg &operand, int bits) const;
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bool IsImm() const {return scale == SCALE_IMM8 || scale == SCALE_IMM16 || scale == SCALE_IMM32 || scale == SCALE_IMM64;}
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@ -240,6 +239,8 @@ private:
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u8 scale;
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u16 offsetOrBaseReg;
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u16 indexReg;
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u64 offset; // use RIP-relative as much as possible - 64-bit immediates are not available.
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u16 operandReg;
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};
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inline OpArg M(const void *ptr) {return OpArg((u64)ptr, (int)SCALE_RIP);}
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