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@ -214,6 +214,18 @@ enum class IMinMaxExchange : u64 {
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XHi = 3,
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};
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enum class VmadType : u64 {
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Size16_Low = 0,
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Size16_High = 1,
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Size32 = 2,
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Invalid = 3,
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};
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enum class VmadShr : u64 {
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Shr7 = 1,
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Shr15 = 2,
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};
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enum class XmadMode : u64 {
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None = 0,
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CLo = 1,
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@ -452,6 +464,7 @@ union Instruction {
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BitField<48, 16, u64> opcode;
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union {
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BitField<20, 16, u64> imm20_16;
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BitField<20, 19, u64> imm20_19;
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BitField<20, 32, s64> imm20_32;
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BitField<45, 1, u64> negate_b;
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@ -493,6 +506,10 @@ union Instruction {
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}
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} lop3;
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u16 GetImm20_16() const {
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return static_cast<u16>(imm20_16);
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}
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u32 GetImm20_19() const {
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u32 imm{static_cast<u32>(imm20_19)};
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imm <<= 12;
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@ -1016,6 +1033,23 @@ union Instruction {
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BitField<47, 2, IsberdShift> shift;
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} isberd;
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union {
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BitField<48, 1, u64> signed_a;
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BitField<38, 1, u64> is_byte_chunk_a;
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BitField<36, 2, VmadType> type_a;
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BitField<36, 2, u64> byte_height_a;
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BitField<49, 1, u64> signed_b;
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BitField<50, 1, u64> use_register_b;
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BitField<30, 1, u64> is_byte_chunk_b;
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BitField<28, 2, VmadType> type_b;
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BitField<28, 2, u64> byte_height_b;
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BitField<51, 2, VmadShr> shr;
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BitField<55, 1, u64> saturate; // Saturates the result (a * b + c)
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BitField<47, 1, u64> cc;
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} vmad;
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union {
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BitField<20, 16, u64> imm20_16;
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BitField<36, 1, u64> product_shift_left;
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@ -1083,6 +1117,7 @@ public:
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IPA,
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OUT_R, // Emit vertex/primitive
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ISBERD,
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VMAD,
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FFMA_IMM, // Fused Multiply and Add
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FFMA_CR,
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FFMA_RC,
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@ -1320,6 +1355,7 @@ private:
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INST("11100000--------", Id::IPA, Type::Trivial, "IPA"),
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INST("1111101111100---", Id::OUT_R, Type::Trivial, "OUT_R"),
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INST("1110111111010---", Id::ISBERD, Type::Trivial, "ISBERD"),
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INST("01011111--------", Id::VMAD, Type::Trivial, "VMAD"),
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INST("0011001-1-------", Id::FFMA_IMM, Type::Ffma, "FFMA_IMM"),
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INST("010010011-------", Id::FFMA_CR, Type::Ffma, "FFMA_CR"),
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INST("010100011-------", Id::FFMA_RC, Type::Ffma, "FFMA_RC"),
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