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@ -3468,10 +3468,10 @@ enum {
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FETCH_FAILURE
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};
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static tdstate decode_thumb_instr(u32 inst, u32 addr, u32* arm_inst, u32* inst_size, ARM_INST_PTR* ptr_inst_base) {
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static ThumbDecodeStatus DecodeThumbInstruction(u32 inst, u32 addr, u32* arm_inst, u32* inst_size, ARM_INST_PTR* ptr_inst_base) {
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// Check if in Thumb mode
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tdstate ret = thumb_translate (addr, inst, arm_inst, inst_size);
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if (ret == t_branch) {
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ThumbDecodeStatus ret = TranslateThumbInstruction (addr, inst, arm_inst, inst_size);
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if (ret == ThumbDecodeStatus::BRANCH) {
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int inst_index;
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int table_length = sizeof(arm_instruction_trans) / sizeof(transop_fp_t);
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u32 tinstr = GetThumbInstruction(inst, addr);
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@ -3509,7 +3509,7 @@ static tdstate decode_thumb_instr(u32 inst, u32 addr, u32* arm_inst, u32* inst_s
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*ptr_inst_base = arm_instruction_trans[inst_index](tinstr, inst_index);
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break;
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default:
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ret = t_undefined;
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ret = ThumbDecodeStatus::UNDEFINED;
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break;
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}
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}
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@ -3542,20 +3542,19 @@ static int InterpreterTranslate(ARMul_State* cpu, int& bb_start, u32 addr) {
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inst = Memory::Read32(phys_addr & 0xFFFFFFFC);
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size++;
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// If we are in thumb instruction, we will translate one thumb to one corresponding arm instruction
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// If we are in Thumb mode, we'll translate one Thumb instruction to the corresponding ARM instruction
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if (cpu->TFlag) {
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uint32_t arm_inst;
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tdstate state = decode_thumb_instr(inst, phys_addr, &arm_inst, &inst_size, &inst_base);
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ThumbDecodeStatus state = DecodeThumbInstruction(inst, phys_addr, &arm_inst, &inst_size, &inst_base);
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// We have translated the branch instruction of thumb in thumb decoder
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if(state == t_branch){
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// We have translated the Thumb branch instruction in the Thumb decoder
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if (state == ThumbDecodeStatus::BRANCH) {
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goto translated;
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}
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inst = arm_inst;
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}
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ret = decode_arm_instr(inst, &idx);
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if (ret == DECODE_FAILURE) {
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if (DecodeARMInstruction(inst, &idx) == ARMDecodeStatus::FAILURE) {
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std::string disasm = ARM_Disasm::Disassemble(phys_addr, inst);
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LOG_ERROR(Core_ARM11, "Decode failure.\tPC : [0x%x]\tInstruction : %s [%x]", phys_addr, disasm.c_str(), inst);
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LOG_ERROR(Core_ARM11, "cpsr=0x%x, cpu->TFlag=%d, r15=0x%x", cpu->Cpsr, cpu->TFlag, cpu->Reg[15]);
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