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@ -126,7 +126,6 @@ void Maxwell3D::InitializeRegisterDefaults() {
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draw_command[MAXWELL3D_REG_INDEX(draw_inline_index)] = true;
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draw_command[MAXWELL3D_REG_INDEX(inline_index_2x16.even)] = true;
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draw_command[MAXWELL3D_REG_INDEX(inline_index_4x8.index0)] = true;
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draw_command[MAXWELL3D_REG_INDEX(draw.instance_id)] = true;
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}
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void Maxwell3D::ProcessMacro(u32 method, const u32* base_start, u32 amount, bool is_last_call) {
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@ -218,16 +217,19 @@ void Maxwell3D::ProcessMethodCall(u32 method, u32 argument, u32 nonshadow_argume
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regs.index_buffer.count = regs.index_buffer32_first.count;
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regs.index_buffer.first = regs.index_buffer32_first.first;
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dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
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draw_indexed = true;
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return ProcessDraw();
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case MAXWELL3D_REG_INDEX(index_buffer16_first):
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regs.index_buffer.count = regs.index_buffer16_first.count;
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regs.index_buffer.first = regs.index_buffer16_first.first;
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dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
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draw_indexed = true;
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return ProcessDraw();
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case MAXWELL3D_REG_INDEX(index_buffer8_first):
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regs.index_buffer.count = regs.index_buffer8_first.count;
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regs.index_buffer.first = regs.index_buffer8_first.first;
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dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
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draw_indexed = true;
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return ProcessDraw();
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case MAXWELL3D_REG_INDEX(topology_override):
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use_topology_override = true;
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@ -300,21 +302,33 @@ void Maxwell3D::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
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draw_mode = DrawMode::InlineIndex;
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};
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switch (method) {
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case MAXWELL3D_REG_INDEX(draw.begin): {
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draw_mode =
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(regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::Subsequent) ||
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(regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::Unchanged)
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? DrawMode::Instance
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: DrawMode::General;
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break;
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}
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case MAXWELL3D_REG_INDEX(draw.end):
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switch (draw_mode) {
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case DrawMode::General:
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ProcessDraw(1);
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ProcessDraw();
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break;
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case DrawMode::InlineIndex:
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regs.index_buffer.count = static_cast<u32>(inline_index_draw_indexes.size() / 4);
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regs.index_buffer.format = Regs::IndexFormat::UnsignedInt;
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ProcessDraw(1);
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draw_indexed = true;
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ProcessDraw();
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inline_index_draw_indexes.clear();
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break;
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case DrawMode::Instance:
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break;
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}
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break;
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case MAXWELL3D_REG_INDEX(index_buffer.count):
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draw_indexed = true;
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break;
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case MAXWELL3D_REG_INDEX(draw_inline_index):
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update_inline_index(method_argument);
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break;
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@ -328,13 +342,6 @@ void Maxwell3D::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
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update_inline_index(regs.inline_index_4x8.index2);
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update_inline_index(regs.inline_index_4x8.index3);
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break;
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case MAXWELL3D_REG_INDEX(draw.instance_id):
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draw_mode =
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(regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::Subsequent) ||
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(regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::Unchanged)
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? DrawMode::Instance
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: DrawMode::General;
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break;
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}
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} else {
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ProcessDeferredDraw();
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@ -624,27 +631,16 @@ void Maxwell3D::ProcessClearBuffers(u32 layer_count) {
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void Maxwell3D::ProcessDraw(u32 instance_count) {
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LOG_TRACE(HW_GPU, "called, topology={}, count={}", regs.draw.topology.Value(),
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regs.vertex_buffer.count);
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ASSERT_MSG(!(regs.index_buffer.count && regs.vertex_buffer.count), "Both indexed and direct?");
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// Both instance configuration registers can not be set at the same time.
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ASSERT_MSG(regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::First ||
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regs.draw.instance_id != Maxwell3D::Regs::Draw::InstanceId::Unchanged,
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"Illegal combination of instancing parameters");
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draw_indexed ? regs.index_buffer.count : regs.vertex_buffer.count);
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ProcessTopologyOverride();
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const bool is_indexed = regs.index_buffer.count && !regs.vertex_buffer.count;
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if (ShouldExecute()) {
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rasterizer->Draw(is_indexed, instance_count);
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rasterizer->Draw(draw_indexed, instance_count);
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}
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if (is_indexed) {
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regs.index_buffer.count = 0;
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} else {
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regs.vertex_buffer.count = 0;
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}
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draw_indexed = false;
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deferred_draw_method.clear();
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}
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void Maxwell3D::ProcessDeferredDraw() {
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@ -667,8 +663,6 @@ void Maxwell3D::ProcessDeferredDraw() {
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ASSERT_MSG(!(vertex_buffer_count && index_buffer_count), "Instance both indexed and direct?");
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ProcessDraw(instance_count);
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deferred_draw_method.clear();
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}
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} // namespace Tegra::Engines
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