@ -6480,9 +6480,13 @@ L_stm_s_takeabort:
// SMUSD and SMLSD
else {
state->Reg[rd_idx] = product1 - product2;
if (BITS(12, 15) != 15)
if (BITS(12, 15) != 15) {
state->Reg[rd_idx] += state->Reg[ra_idx];
if (ARMul_AddOverflowQ(product1 - product2, state->Reg[ra_idx]))
SETQ;
}
return 1;