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@ -69,6 +69,11 @@ Id StorageAtomicU32(EmitContext& ctx, const IR::Value& binding, const IR::Value&
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Id StorageAtomicU64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, Id value,
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Id (Sirit::Module::*atomic_func)(Id, Id, Id, Id, Id),
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Id (Sirit::Module::*non_atomic_func)(Id, Id, Id)) {
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if (!ctx.profile.support_descriptor_aliasing) {
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LOG_WARNING(Shader_SPIRV, "Descriptor aliasing not supported, this cannot be atomic.");
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return ctx.ConstantNull(ctx.U64);
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}
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if (ctx.profile.support_int64_atomics) {
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const Id pointer{StoragePointer(ctx, ctx.storage_types.U64, &StorageDefinitions::U64,
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binding, offset, sizeof(u64))};
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@ -86,6 +91,11 @@ Id StorageAtomicU64(EmitContext& ctx, const IR::Value& binding, const IR::Value&
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Id StorageAtomicU32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, Id value,
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Id (Sirit::Module::*non_atomic_func)(Id, Id, Id)) {
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if (!ctx.profile.support_descriptor_aliasing) {
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LOG_WARNING(Shader_SPIRV, "Descriptor aliasing not supported, this cannot be atomic.");
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return ctx.ConstantNull(ctx.U32[2]);
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}
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LOG_WARNING(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
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const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2,
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binding, offset, sizeof(u32[2]))};
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