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pica/regs: layout geometry shader configuration regs 

All the register meanings are derived from ctrulib (3dbrew is outdated for most of them)
master
wwylele 2017-07-24 14:13:33 +07:00
parent c2466a2f19
commit db309b2423
2 changed files with 39 additions and 2 deletions
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34
src/video_core/regs_pipeline.h
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@ -147,7 +147,15 @@ struct PipelineRegs {
// Number of vertices to render
u32 num_vertices;
INSERT_PADDING_WORDS(0x1);
enum class UseGS : u32 {
No = 0,
Yes = 2,
};
union {
BitField<0, 2, UseGS> use_gs;
BitField<31, 1, u32> variable_primitive;
};
// The index of the first vertex to render
u32 vertex_offset;
@ -218,7 +226,29 @@ struct PipelineRegs {
GPUMode gpu_mode;
INSERT_PADDING_WORDS(0x18);
INSERT_PADDING_WORDS(0x4);
BitField<0, 4, u32> vs_outmap_total_minus_1_a;
INSERT_PADDING_WORDS(0x6);
BitField<0, 4, u32> vs_outmap_total_minus_1_b;
enum class GSMode : u32 {
Point = 0,
VariablePrimitive = 1,
FixedPrimitive = 2,
};
union {
BitField<0, 8, GSMode> mode;
BitField<8, 4, u32> fixed_vertex_num_minus_1;
BitField<12, 4, u32> stride_minus_1;
BitField<16, 4, u32> start_index;
} gs_config;
INSERT_PADDING_WORDS(0x1);
u32 variable_vertex_main_num_minus_1;
INSERT_PADDING_WORDS(0x9);
enum class TriangleTopology : u32 {
List = 0,

7
src/video_core/regs_shader.h
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@ -24,9 +24,16 @@ struct ShaderRegs {
INSERT_PADDING_WORDS(0x4);
enum ShaderMode {
GS = 0x08,
VS = 0xA0,
};
union {
// Number of input attributes to shader unit - 1
BitField<0, 4, u32> max_input_attribute_index;
BitField<8, 8, u32> input_to_uniform;
BitField<24, 8, ShaderMode> shader_mode;
};
// Offset to shader program entry point (in words)