shader: Implement ISET, add common_funcs
ameerj
parent
bec7d3111d
commit
e038928616
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "shader_recompiler/frontend/maxwell/translate/impl/common_funcs.h"
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namespace Shader::Maxwell {
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[[nodiscard]] IR::U1 IntegerCompare(TranslatorVisitor& v, const IR::U32& operand_1,
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const IR::U32& operand_2, ComparisonOp compare_op,
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bool is_signed) {
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switch (compare_op) {
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case ComparisonOp::False:
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return v.ir.Imm1(false);
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case ComparisonOp::LessThan:
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return v.ir.ILessThan(operand_1, operand_2, is_signed);
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case ComparisonOp::Equal:
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return v.ir.IEqual(operand_1, operand_2);
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case ComparisonOp::LessThanEqual:
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return v.ir.ILessThanEqual(operand_1, operand_2, is_signed);
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case ComparisonOp::GreaterThan:
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return v.ir.IGreaterThan(operand_1, operand_2, is_signed);
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case ComparisonOp::NotEqual:
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return v.ir.INotEqual(operand_1, operand_2);
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case ComparisonOp::GreaterThanEqual:
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return v.ir.IGreaterThanEqual(operand_1, operand_2, is_signed);
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case ComparisonOp::True:
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return v.ir.Imm1(true);
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default:
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throw NotImplementedException("CMP");
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}
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}
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[[nodiscard]] IR::U1 PredicateCombine(TranslatorVisitor& v, const IR::U1& predicate_1,
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const IR::U1& predicate_2, BooleanOp bop) {
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switch (bop) {
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case BooleanOp::And:
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return v.ir.LogicalAnd(predicate_1, predicate_2);
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case BooleanOp::Or:
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return v.ir.LogicalOr(predicate_1, predicate_2);
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case BooleanOp::Xor:
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return v.ir.LogicalXor(predicate_1, predicate_2);
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default:
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throw NotImplementedException("BOP");
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}
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}
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} // namespace Shader::Maxwell
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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[[nodiscard]] IR::U1 IntegerCompare(TranslatorVisitor& v, const IR::U32& operand_1,
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const IR::U32& operand_2, ComparisonOp compare_op,
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bool is_signed);
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[[nodiscard]] IR::U1 PredicateCombine(TranslatorVisitor& v, const IR::U1& predicate_1,
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const IR::U1& predicate_2, BooleanOp bop);
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} // namespace Shader::Maxwell
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/common_funcs.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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namespace {
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void ISET(TranslatorVisitor& v, u64 insn, const IR::U32& src_a) {
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union {
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u64 insn;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<8, 8, IR::Reg> src_reg;
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BitField<39, 3, IR::Pred> pred;
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BitField<42, 1, u64> neg_pred;
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BitField<43, 1, u64> x;
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BitField<44, 1, u64> bf;
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BitField<45, 2, BooleanOp> bop;
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BitField<48, 1, u64> is_signed;
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BitField<49, 3, ComparisonOp> compare_op;
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} const iset{insn};
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if (iset.x != 0) {
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throw NotImplementedException("ISET.X");
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}
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const IR::U32 src_reg{v.X(iset.src_reg)};
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const bool is_signed{iset.is_signed != 0};
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IR::U1 pred{v.ir.GetPred(iset.pred)};
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if (iset.neg_pred != 0) {
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pred = v.ir.LogicalNot(pred);
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}
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const IR::U1 cmp_result{IntegerCompare(v, src_reg, src_a, iset.compare_op, is_signed)};
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const IR::U1 bop_result{PredicateCombine(v, cmp_result, pred, iset.bop)};
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const IR::U32 one_mask{v.ir.Imm32(-1)};
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const IR::U32 fp_one{v.ir.Imm32(0x3f800000)};
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const IR::U32 fail_result{v.ir.Imm32(0)};
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const IR::U32 pass_result{iset.bf == 0 ? one_mask : fp_one};
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const IR::U32 result{v.ir.Select(bop_result, pass_result, fail_result)};
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v.X(iset.dest_reg, result);
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}
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} // Anonymous namespace
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void TranslatorVisitor::ISET_reg(u64 insn) {
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ISET(*this, insn, GetReg20(insn));
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}
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void TranslatorVisitor::ISET_cbuf(u64 insn) {
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ISET(*this, insn, GetCbuf(insn));
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}
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void TranslatorVisitor::ISET_imm(u64 insn) {
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ISET(*this, insn, GetImm20(insn));
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}
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} // namespace Shader::Maxwell
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