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@ -104,8 +104,10 @@ typedef unsigned long UBaseType_t;
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/* Critical section management. */
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/* Critical section management. */
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extern void vPortEnterCritical( void );
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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extern void vPortExitCritical( void );
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
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extern uint32_t ulSetInterruptMaskFromISR( void ) __attribute__( ( naked ) );
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortSetBASEPRI(x)
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extern void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__( ( naked ) );
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x )
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#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
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#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
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#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" )
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#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" )
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portENTER_CRITICAL() vPortEnterCritical()
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