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Caleb Fontenot 2022-09-14 08:14:33 +07:00
parent 51e11e69cd
commit 1e800418a8
4 changed files with 83 additions and 40 deletions
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123
lab9/LightSwitch.circ
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@ -2,7 +2,17 @@
<project source="2.7.1" version="1.0">
This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
<lib desc="#Wiring" name="0"/>
<lib desc="#Wiring" name="0">
<tool name="Splitter">
<a name="facing" val="north"/>
<a name="fanout" val="8"/>
<a name="incoming" val="8"/>
<a name="appear" val="legacy"/>
</tool>
<tool name="Pin">
<a name="facing" val="south"/>
</tool>
</lib>
<lib desc="#Gates" name="1">
<tool name="NOT Gate">
<a name="label" val="A"/>
@ -63,42 +73,57 @@
<a name="clabelup" val="east"/>
<a name="clabelfont" val="SansSerif plain 12"/>
<wire from="(170,170)" to="(170,300)"/>
<wire from="(170,300)" to="(170,690)"/>
<wire from="(170,300)" to="(290,300)"/>
<wire from="(110,360)" to="(110,690)"/>
<wire from="(110,260)" to="(290,260)"/>
<wire from="(110,360)" to="(290,360)"/>
<wire from="(200,230)" to="(200,690)"/>
<wire from="(230,230)" to="(230,690)"/>
<wire from="(390,380)" to="(450,380)"/>
<wire from="(390,340)" to="(450,340)"/>
<wire from="(230,280)" to="(290,280)"/>
<wire from="(230,400)" to="(290,400)"/>
<wire from="(340,460)" to="(390,460)"/>
<wire from="(340,280)" to="(390,280)"/>
<wire from="(110,380)" to="(290,380)"/>
<wire from="(110,440)" to="(290,440)"/>
<wire from="(380,340)" to="(380,350)"/>
<wire from="(110,130)" to="(110,150)"/>
<wire from="(390,380)" to="(390,460)"/>
<wire from="(230,400)" to="(230,490)"/>
<wire from="(140,460)" to="(140,490)"/>
<wire from="(260,360)" to="(290,360)"/>
<wire from="(260,420)" to="(290,420)"/>
<wire from="(140,340)" to="(290,340)"/>
<wire from="(140,460)" to="(290,460)"/>
<wire from="(200,320)" to="(200,490)"/>
<wire from="(170,130)" to="(170,170)"/>
<wire from="(230,230)" to="(230,280)"/>
<wire from="(500,360)" to="(510,360)"/>
<wire from="(140,160)" to="(140,340)"/>
<wire from="(260,360)" to="(260,420)"/>
<wire from="(230,280)" to="(230,400)"/>
<wire from="(380,350)" to="(450,350)"/>
<wire from="(380,370)" to="(450,370)"/>
<wire from="(200,260)" to="(200,320)"/>
<wire from="(260,420)" to="(260,490)"/>
<wire from="(260,230)" to="(260,360)"/>
<wire from="(170,480)" to="(170,490)"/>
<wire from="(170,300)" to="(290,300)"/>
<wire from="(170,480)" to="(290,480)"/>
<wire from="(260,170)" to="(260,200)"/>
<wire from="(380,370)" to="(380,400)"/>
<wire from="(140,130)" to="(140,160)"/>
<wire from="(140,340)" to="(140,690)"/>
<wire from="(260,230)" to="(260,320)"/>
<wire from="(200,230)" to="(200,260)"/>
<wire from="(340,340)" to="(380,340)"/>
<wire from="(340,400)" to="(380,400)"/>
<wire from="(140,160)" to="(230,160)"/>
<wire from="(170,170)" to="(260,170)"/>
<wire from="(110,260)" to="(110,360)"/>
<wire from="(260,320)" to="(290,320)"/>
<wire from="(200,260)" to="(290,260)"/>
<wire from="(200,320)" to="(290,320)"/>
<wire from="(110,150)" to="(200,150)"/>
<wire from="(140,280)" to="(290,280)"/>
<wire from="(140,340)" to="(290,340)"/>
<wire from="(170,130)" to="(170,170)"/>
<wire from="(110,150)" to="(110,380)"/>
<wire from="(230,160)" to="(230,200)"/>
<wire from="(110,150)" to="(110,260)"/>
<wire from="(200,150)" to="(200,200)"/>
<wire from="(260,320)" to="(260,690)"/>
<wire from="(140,160)" to="(140,280)"/>
<wire from="(140,280)" to="(140,340)"/>
<comp lib="1" loc="(340,400)" name="AND Gate">
<a name="inputs" val="3"/>
</comp>
<comp lib="1" loc="(230,230)" name="NOT Gate">
<a name="facing" val="south"/>
<a name="label" val="!B"/>
</comp>
<comp lib="1" loc="(340,280)" name="AND Gate">
<a name="inputs" val="3"/>
</comp>
<wire from="(110,440)" to="(110,490)"/>
<wire from="(170,300)" to="(170,480)"/>
<wire from="(140,340)" to="(140,460)"/>
<wire from="(390,280)" to="(390,340)"/>
<wire from="(110,380)" to="(110,440)"/>
<comp lib="1" loc="(340,340)" name="AND Gate">
<a name="inputs" val="3"/>
</comp>
@ -108,18 +133,19 @@
<a name="label" val="A"/>
<a name="labelloc" val="north"/>
</comp>
<comp lib="1" loc="(340,460)" name="AND Gate">
<comp lib="1" loc="(500,360)" name="OR Gate">
<a name="inputs" val="4"/>
</comp>
<comp lib="1" loc="(230,230)" name="NOT Gate">
<a name="facing" val="south"/>
<a name="label" val="!B"/>
</comp>
<comp lib="1" loc="(340,280)" name="AND Gate">
<a name="inputs" val="3"/>
</comp>
<comp lib="1" loc="(260,230)" name="NOT Gate">
<comp lib="1" loc="(200,230)" name="NOT Gate">
<a name="facing" val="south"/>
<a name="label" val="!C"/>
</comp>
<comp lib="0" loc="(170,130)" name="Pin">
<a name="facing" val="south"/>
<a name="tristate" val="false"/>
<a name="label" val="C"/>
<a name="labelloc" val="north"/>
<a name="label" val="!A"/>
</comp>
<comp lib="0" loc="(140,130)" name="Pin">
<a name="facing" val="south"/>
@ -127,9 +153,26 @@
<a name="label" val="B"/>
<a name="labelloc" val="north"/>
</comp>
<comp lib="1" loc="(200,230)" name="NOT Gate">
<comp lib="1" loc="(260,230)" name="NOT Gate">
<a name="facing" val="south"/>
<a name="label" val="!A"/>
<a name="label" val="!C"/>
</comp>
<comp lib="0" loc="(510,360)" name="Pin">
<a name="facing" val="west"/>
<a name="output" val="true"/>
<a name="labelloc" val="east"/>
</comp>
<comp lib="1" loc="(340,400)" name="AND Gate">
<a name="inputs" val="3"/>
</comp>
<comp lib="0" loc="(170,130)" name="Pin">
<a name="facing" val="south"/>
<a name="tristate" val="false"/>
<a name="label" val="C"/>
<a name="labelloc" val="north"/>
</comp>
<comp lib="1" loc="(340,460)" name="AND Gate">
<a name="inputs" val="3"/>
</comp>
</circuit>
</project>

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lab_8bitAND_8bitOR.pdf
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