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@ -256,6 +256,10 @@ void PicaCore::WriteInternalReg(u32 id, u32 value, u32 mask) {
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case PICA_REG_INDEX(vs.bool_uniforms):
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vs_setup.WriteUniformBoolReg(regs.internal.vs.bool_uniforms.Value());
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if (!regs.internal.pipeline.gs_unit_exclusive_configuration &&
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regs.internal.pipeline.use_gs == PipelineRegs::UseGS::No) {
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gs_setup.WriteUniformBoolReg(regs.internal.vs.bool_uniforms.Value());
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}
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break;
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case PICA_REG_INDEX(vs.int_uniforms[0]):
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@ -264,6 +268,10 @@ void PicaCore::WriteInternalReg(u32 id, u32 value, u32 mask) {
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case PICA_REG_INDEX(vs.int_uniforms[3]): {
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const u32 index = (id - PICA_REG_INDEX(vs.int_uniforms[0]));
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vs_setup.WriteUniformIntReg(index, regs.internal.vs.GetIntUniform(index));
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if (!regs.internal.pipeline.gs_unit_exclusive_configuration &&
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regs.internal.pipeline.use_gs == PipelineRegs::UseGS::No) {
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gs_setup.WriteUniformIntReg(index, regs.internal.vs.GetIntUniform(index));
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}
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break;
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}
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@ -275,7 +283,11 @@ void PicaCore::WriteInternalReg(u32 id, u32 value, u32 mask) {
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case PICA_REG_INDEX(vs.uniform_setup.set_value[5]):
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case PICA_REG_INDEX(vs.uniform_setup.set_value[6]):
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case PICA_REG_INDEX(vs.uniform_setup.set_value[7]): {
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vs_setup.WriteUniformFloatReg(regs.internal.vs, value);
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const auto index = vs_setup.WriteUniformFloatReg(regs.internal.vs, value);
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if (!regs.internal.pipeline.gs_unit_exclusive_configuration &&
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regs.internal.pipeline.use_gs == PipelineRegs::UseGS::No && index) {
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gs_setup.uniforms.f[index.value()] = vs_setup.uniforms.f[index.value()];
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}
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break;
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}
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