renderer_opengl: add PICA->GLSL shader decompiler
wwylele
parent
384849232b
commit
f8a292f920
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// Copyright 2017 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <set>
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#include <string>
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#include <nihstro/shader_bytecode.h>
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "video_core/renderer_opengl/gl_shader_decompiler.h"
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namespace Pica {
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namespace Shader {
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namespace Decompiler {
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using nihstro::Instruction;
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using nihstro::OpCode;
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using nihstro::RegisterType;
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using nihstro::SourceRegister;
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using nihstro::SwizzlePattern;
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constexpr u32 PROGRAM_END = MAX_PROGRAM_CODE_LENGTH;
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/// Describes the behaviour of code path of a given entry point and a return point.
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enum class ExitMethod {
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Undetermined, ///< Internal value. Only occur when analyzing JMP loop.
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AlwaysReturn, ///< All code paths reach the return point.
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Conditional, ///< Code path reaches the return point or an END instruction conditionally.
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AlwaysEnd, ///< All code paths reach a END instruction.
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};
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/// A subroutine is a range of code refereced by a CALL, IF or LOOP instruction.
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struct Subroutine {
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/// Generates a name suitable for GLSL source code.
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std::string GetName() const {
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return "sub_" + std::to_string(begin) + "_" + std::to_string(end);
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}
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u32 begin; ///< Entry point of the subroutine.
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u32 end; ///< Return point of the subroutine.
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ExitMethod exit_method; ///< Exit method of the subroutine.
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std::set<u32> labels; ///< Addresses refereced by JMP instructions.
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bool operator<(const Subroutine& rhs) const {
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if (begin == rhs.begin) {
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return end < rhs.end;
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}
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return begin < rhs.begin;
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}
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};
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/// Analyzes shader code and produces a set of subroutines.
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class ControlFlowAnalyzer {
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public:
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ControlFlowAnalyzer(const ProgramCode& program_code, u32 main_offset)
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: program_code(program_code) {
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// Recursively finds all subroutines.
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const Subroutine& program_main = AddSubroutine(main_offset, PROGRAM_END);
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ASSERT(program_main.exit_method == ExitMethod::AlwaysEnd);
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}
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std::set<Subroutine> GetSubroutines() {
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return std::move(subroutines);
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}
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private:
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const ProgramCode& program_code;
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std::set<Subroutine> subroutines;
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std::map<std::pair<u32, u32>, ExitMethod> exit_method_map;
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/// Adds and analyzes a new subroutine if it is not added yet.
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const Subroutine& AddSubroutine(u32 begin, u32 end) {
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auto iter = subroutines.find(Subroutine{begin, end});
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if (iter != subroutines.end())
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return *iter;
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Subroutine subroutine{begin, end};
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subroutine.exit_method = Scan(begin, end, subroutine.labels);
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return *subroutines.insert(std::move(subroutine)).first;
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}
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/// Merges exit method of two parallel branches.
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static ExitMethod ParallelExit(ExitMethod a, ExitMethod b) {
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if (a == ExitMethod::Undetermined) {
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return b;
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}
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if (b == ExitMethod::Undetermined) {
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return a;
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}
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if (a == b) {
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return a;
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}
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return ExitMethod::Conditional;
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}
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/// Cascades exit method of two blocks of code.
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static ExitMethod SeriesExit(ExitMethod a, ExitMethod b) {
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// This should be handled before evaluating b.
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DEBUG_ASSERT(a != ExitMethod::AlwaysEnd);
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if (a == ExitMethod::Undetermined) {
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return ExitMethod::Undetermined;
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}
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if (a == ExitMethod::AlwaysReturn) {
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return b;
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}
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if (b == ExitMethod::Undetermined || b == ExitMethod::AlwaysEnd) {
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return ExitMethod::AlwaysEnd;
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}
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return ExitMethod::Conditional;
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}
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/// Scans a range of code for labels and determines the exit method.
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ExitMethod Scan(u32 begin, u32 end, std::set<u32>& labels) {
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auto [iter, inserted] =
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exit_method_map.emplace(std::make_pair(begin, end), ExitMethod::Undetermined);
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ExitMethod& exit_method = iter->second;
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if (!inserted)
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return exit_method;
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u32 offset = begin;
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for (u32 offset = begin; offset < (begin > end ? PROGRAM_END : end); ++offset) {
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const Instruction instr = {program_code[offset]};
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switch (instr.opcode.Value()) {
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case OpCode::Id::END: {
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return exit_method = ExitMethod::AlwaysEnd;
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}
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case OpCode::Id::JMPC:
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case OpCode::Id::JMPU: {
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labels.insert(instr.flow_control.dest_offset);
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ExitMethod no_jmp = Scan(offset + 1, end, labels);
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ExitMethod jmp = Scan(instr.flow_control.dest_offset, end, labels);
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return exit_method = ParallelExit(no_jmp, jmp);
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}
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case OpCode::Id::CALL: {
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auto& call = AddSubroutine(instr.flow_control.dest_offset,
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instr.flow_control.dest_offset +
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instr.flow_control.num_instructions);
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if (call.exit_method == ExitMethod::AlwaysEnd)
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return exit_method = ExitMethod::AlwaysEnd;
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ExitMethod after_call = Scan(offset + 1, end, labels);
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return exit_method = SeriesExit(call.exit_method, after_call);
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}
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case OpCode::Id::LOOP: {
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auto& loop = AddSubroutine(offset + 1, instr.flow_control.dest_offset + 1);
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if (loop.exit_method == ExitMethod::AlwaysEnd)
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return exit_method = ExitMethod::AlwaysEnd;
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ExitMethod after_loop = Scan(instr.flow_control.dest_offset + 1, end, labels);
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return exit_method = SeriesExit(loop.exit_method, after_loop);
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}
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case OpCode::Id::CALLC:
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case OpCode::Id::CALLU: {
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auto& call = AddSubroutine(instr.flow_control.dest_offset,
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instr.flow_control.dest_offset +
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instr.flow_control.num_instructions);
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ExitMethod after_call = Scan(offset + 1, end, labels);
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return exit_method = SeriesExit(
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ParallelExit(call.exit_method, ExitMethod::AlwaysReturn), after_call);
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}
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case OpCode::Id::IFU:
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case OpCode::Id::IFC: {
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auto& if_sub = AddSubroutine(offset + 1, instr.flow_control.dest_offset);
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ExitMethod else_method;
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if (instr.flow_control.num_instructions != 0) {
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auto& else_sub = AddSubroutine(instr.flow_control.dest_offset,
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instr.flow_control.dest_offset +
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instr.flow_control.num_instructions);
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else_method = else_sub.exit_method;
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} else {
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else_method = ExitMethod::AlwaysReturn;
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}
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ExitMethod both = ParallelExit(if_sub.exit_method, else_method);
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if (both == ExitMethod::AlwaysEnd)
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return exit_method = ExitMethod::AlwaysEnd;
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ExitMethod after_call =
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Scan(instr.flow_control.dest_offset + instr.flow_control.num_instructions, end,
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labels);
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return exit_method = SeriesExit(both, after_call);
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}
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}
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}
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return exit_method = ExitMethod::AlwaysReturn;
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}
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};
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class ShaderWriter {
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public:
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void AddLine(const std::string& text) {
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ASSERT(scope >= 0);
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if (!text.empty()) {
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shader_source += std::string(static_cast<size_t>(scope) * 4, ' ');
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}
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shader_source += text + '\n';
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}
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std::string GetResult() {
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return std::move(shader_source);
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}
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int scope = 0;
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private:
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std::string shader_source;
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};
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/// An adaptor for getting swizzle pattern string from nihstro interfaces.
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template <SwizzlePattern::Selector (SwizzlePattern::*getter)(int) const>
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std::string GetSelectorSrc(const SwizzlePattern& pattern) {
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std::string out;
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for (std::size_t i = 0; i < 4; ++i) {
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switch ((pattern.*getter)(i)) {
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case SwizzlePattern::Selector::x:
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out += "x";
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break;
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case SwizzlePattern::Selector::y:
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out += "y";
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break;
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case SwizzlePattern::Selector::z:
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out += "z";
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break;
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case SwizzlePattern::Selector::w:
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out += "w";
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break;
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default:
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UNREACHABLE();
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return "";
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}
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}
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return out;
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}
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constexpr auto GetSelectorSrc1 = GetSelectorSrc<&SwizzlePattern::GetSelectorSrc1>;
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constexpr auto GetSelectorSrc2 = GetSelectorSrc<&SwizzlePattern::GetSelectorSrc2>;
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constexpr auto GetSelectorSrc3 = GetSelectorSrc<&SwizzlePattern::GetSelectorSrc3>;
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class GLSLGenerator {
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public:
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GLSLGenerator(const std::set<Subroutine>& subroutines, const ProgramCode& program_code,
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const SwizzleData& swizzle_data, u32 main_offset,
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const RegGetter& inputreg_getter, const RegGetter& outputreg_getter,
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bool sanitize_mul, bool is_gs)
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: subroutines(subroutines), program_code(program_code), swizzle_data(swizzle_data),
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main_offset(main_offset), inputreg_getter(inputreg_getter),
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outputreg_getter(outputreg_getter), sanitize_mul(sanitize_mul), is_gs(is_gs) {
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Generate();
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}
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std::string GetShaderCode() {
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return shader.GetResult();
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}
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private:
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/// Gets the Subroutine object corresponding to the specified address.
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const Subroutine& GetSubroutine(u32 begin, u32 end) const {
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auto iter = subroutines.find(Subroutine{begin, end});
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ASSERT(iter != subroutines.end());
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return *iter;
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}
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/// Generates condition evaluation code for the flow control instruction.
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static std::string EvaluateCondition(Instruction::FlowControlType flow_control) {
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using Op = Instruction::FlowControlType::Op;
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std::string result_x =
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flow_control.refx.Value() ? "conditional_code.x" : "!conditional_code.x";
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std::string result_y =
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flow_control.refy.Value() ? "conditional_code.y" : "!conditional_code.y";
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switch (flow_control.op) {
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case Op::JustX:
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return result_x;
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case Op::JustY:
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return result_y;
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case Op::Or:
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case Op::And: {
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std::string and_or = flow_control.op == Op::Or ? "any" : "all";
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std::string bvec;
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if (flow_control.refx.Value() && flow_control.refy.Value()) {
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bvec = "conditional_code";
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} else if (!flow_control.refx.Value() && !flow_control.refy.Value()) {
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bvec = "not(conditional_code)";
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} else {
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bvec = "bvec2(" + result_x + ", " + result_y + ")";
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}
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return and_or + "(" + bvec + ")";
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}
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default:
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UNREACHABLE();
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return "";
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}
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};
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/// Generates code representing a source register.
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std::string GetSourceRegister(const SourceRegister& source_reg,
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u32 address_register_index) const {
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u32 index = static_cast<u32>(source_reg.GetIndex());
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std::string index_str = std::to_string(index);
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switch (source_reg.GetRegisterType()) {
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case RegisterType::Input:
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return inputreg_getter(index);
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case RegisterType::Temporary:
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return "reg_tmp" + index_str;
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case RegisterType::FloatUniform:
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if (address_register_index != 0) {
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index_str +=
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std::string(" + address_registers.") + "xyz"[address_register_index - 1];
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}
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return "uniforms.f[" + index_str + "]";
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default:
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UNREACHABLE();
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return "";
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}
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};
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/// Generates code representing a destination register.
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std::string GetDestRegister(const DestRegister& dest_reg) const {
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u32 index = static_cast<u32>(dest_reg.GetIndex());
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switch (dest_reg.GetRegisterType()) {
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case RegisterType::Output:
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return outputreg_getter(index);
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case RegisterType::Temporary:
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return "reg_tmp" + std::to_string(index);
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default:
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UNREACHABLE();
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return "";
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}
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};
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/// Generates code representing a bool uniform
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std::string GetUniformBool(u32 index) const {
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if (is_gs && index == 15) {
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// The uniform b15 is set to true after every geometry shader invocation.
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return "((gl_PrimitiveIDIn == 0) || uniforms.b[15])";
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}
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return "uniforms.b[" + std::to_string(index) + "]";
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};
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/**
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* Adds code that calls a subroutine.
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* @param subroutine the subroutine to call.
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*/
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void CallSubroutine(const Subroutine& subroutine) {
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if (subroutine.exit_method == ExitMethod::AlwaysEnd) {
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shader.AddLine(subroutine.GetName() + "();");
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shader.AddLine("return true;");
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} else if (subroutine.exit_method == ExitMethod::Conditional) {
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shader.AddLine("if (" + subroutine.GetName() + "()) { return true; }");
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} else {
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shader.AddLine(subroutine.GetName() + "();");
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}
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};
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/**
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* Writes code that does an assignment operation.
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* @param swizzle the swizzle data of the current instruction.
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* @param reg the destination register code.
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* @param value the code representing the value to assign.
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* @param dest_num_components number of components of the destination register.
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* @param value_num_components number of components of the value to assign.
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*/
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void SetDest(const SwizzlePattern& swizzle, const std::string& reg, const std::string& value,
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u32 dest_num_components, u32 value_num_components) {
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u32 dest_mask_num_components = 0;
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std::string dest_mask_swizzle = ".";
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for (u32 i = 0; i < dest_num_components; ++i) {
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if (swizzle.DestComponentEnabled(static_cast<int>(i))) {
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||||||
|
dest_mask_swizzle += "xyzw"[i];
|
||||||
|
++dest_mask_num_components;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (reg.empty() || dest_mask_num_components == 0) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
ASSERT(value_num_components >= dest_num_components || value_num_components == 1);
|
||||||
|
|
||||||
|
std::string dest = reg + (dest_num_components != 1 ? dest_mask_swizzle : "");
|
||||||
|
|
||||||
|
std::string src = value;
|
||||||
|
if (value_num_components == 1) {
|
||||||
|
if (dest_mask_num_components != 1) {
|
||||||
|
src = "vec" + std::to_string(dest_mask_num_components) + "(" + value + ")";
|
||||||
|
}
|
||||||
|
} else if (value_num_components != dest_mask_num_components) {
|
||||||
|
src = "(" + value + ")" + dest_mask_swizzle;
|
||||||
|
}
|
||||||
|
|
||||||
|
shader.AddLine(dest + " = " + src + ";");
|
||||||
|
};
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Compiles a single instruction from PICA to GLSL.
|
||||||
|
* @param offset the offset of the PICA shader instruction.
|
||||||
|
* @return the offset of the next instruction to execute. Usually it is the current offset + 1.
|
||||||
|
* If the current instruction is IF or LOOP, the next instruction is after the IF or LOOP block.
|
||||||
|
* If the current instruction always terminates the program, returns PROGRAM_END.
|
||||||
|
*/
|
||||||
|
u32 CompileInstr(u32 offset) {
|
||||||
|
const Instruction instr = {program_code[offset]};
|
||||||
|
|
||||||
|
size_t swizzle_offset = instr.opcode.Value().GetInfo().type == OpCode::Type::MultiplyAdd
|
||||||
|
? instr.mad.operand_desc_id
|
||||||
|
: instr.common.operand_desc_id;
|
||||||
|
const SwizzlePattern swizzle = {swizzle_data[swizzle_offset]};
|
||||||
|
|
||||||
|
shader.AddLine("// " + std::to_string(offset) + ": " + instr.opcode.Value().GetInfo().name);
|
||||||
|
|
||||||
|
switch (instr.opcode.Value().GetInfo().type) {
|
||||||
|
case OpCode::Type::Arithmetic: {
|
||||||
|
const bool is_inverted =
|
||||||
|
(0 != (instr.opcode.Value().GetInfo().subtype & OpCode::Info::SrcInversed));
|
||||||
|
|
||||||
|
std::string src1 = swizzle.negate_src1 ? "-" : "";
|
||||||
|
src1 += GetSourceRegister(instr.common.GetSrc1(is_inverted),
|
||||||
|
!is_inverted * instr.common.address_register_index);
|
||||||
|
src1 += "." + GetSelectorSrc1(swizzle);
|
||||||
|
|
||||||
|
std::string src2 = swizzle.negate_src2 ? "-" : "";
|
||||||
|
src2 += GetSourceRegister(instr.common.GetSrc2(is_inverted),
|
||||||
|
is_inverted * instr.common.address_register_index);
|
||||||
|
src2 += "." + GetSelectorSrc2(swizzle);
|
||||||
|
|
||||||
|
std::string dest_reg = GetDestRegister(instr.common.dest.Value());
|
||||||
|
|
||||||
|
switch (instr.opcode.Value().EffectiveOpCode()) {
|
||||||
|
case OpCode::Id::ADD: {
|
||||||
|
SetDest(swizzle, dest_reg, src1 + " + " + src2, 4, 4);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::MUL: {
|
||||||
|
if (sanitize_mul) {
|
||||||
|
SetDest(swizzle, dest_reg, "sanitize_mul(" + src1 + ", " + src2 + ")", 4, 4);
|
||||||
|
} else {
|
||||||
|
SetDest(swizzle, dest_reg, src1 + " * " + src2, 4, 4);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::FLR: {
|
||||||
|
SetDest(swizzle, dest_reg, "floor(" + src1 + ")", 4, 4);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::MAX: {
|
||||||
|
SetDest(swizzle, dest_reg, "max(" + src1 + ", " + src2 + ")", 4, 4);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::MIN: {
|
||||||
|
SetDest(swizzle, dest_reg, "min(" + src1 + ", " + src2 + ")", 4, 4);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::DP3:
|
||||||
|
case OpCode::Id::DP4:
|
||||||
|
case OpCode::Id::DPH:
|
||||||
|
case OpCode::Id::DPHI: {
|
||||||
|
OpCode::Id opcode = instr.opcode.Value().EffectiveOpCode();
|
||||||
|
std::string dot;
|
||||||
|
if (opcode == OpCode::Id::DP3) {
|
||||||
|
if (sanitize_mul) {
|
||||||
|
dot = "dot(vec3(sanitize_mul(" + src1 + ", " + src2 + ")), vec3(1.0))";
|
||||||
|
} else {
|
||||||
|
dot = "dot(vec3(" + src1 + "), vec3(" + src2 + "))";
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
std::string src1_ = (opcode == OpCode::Id::DPH || opcode == OpCode::Id::DPHI)
|
||||||
|
? "vec4(" + src1 + ".xyz, 1.0)"
|
||||||
|
: src1;
|
||||||
|
if (sanitize_mul) {
|
||||||
|
dot = "dot(sanitize_mul(" + src1_ + ", " + src2 + "), vec4(1.0))";
|
||||||
|
} else {
|
||||||
|
dot = "dot(" + src1 + ", " + src2 + ")";
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
SetDest(swizzle, dest_reg, dot, 4, 1);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::RCP: {
|
||||||
|
SetDest(swizzle, dest_reg, "(1.0 / " + src1 + ".x)", 4, 1);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::RSQ: {
|
||||||
|
SetDest(swizzle, dest_reg, "inversesqrt(" + src1 + ".x)", 4, 1);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::MOVA: {
|
||||||
|
SetDest(swizzle, "address_registers", "ivec2(" + src1 + ")", 2, 2);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::MOV: {
|
||||||
|
SetDest(swizzle, dest_reg, src1, 4, 4);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::SGE:
|
||||||
|
case OpCode::Id::SGEI: {
|
||||||
|
SetDest(swizzle, dest_reg, "vec4(greaterThanEqual(" + src1 + "," + src2 + "))", 4,
|
||||||
|
4);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::SLT:
|
||||||
|
case OpCode::Id::SLTI: {
|
||||||
|
SetDest(swizzle, dest_reg, "vec4(lessThan(" + src1 + "," + src2 + "))", 4, 4);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::CMP: {
|
||||||
|
using CompareOp = Instruction::Common::CompareOpType::Op;
|
||||||
|
const std::map<CompareOp, std::pair<std::string, std::string>> cmp_ops{
|
||||||
|
{CompareOp::Equal, {"==", "equal"}},
|
||||||
|
{CompareOp::NotEqual, {"!=", "notEqual"}},
|
||||||
|
{CompareOp::LessThan, {"<", "lessThan"}},
|
||||||
|
{CompareOp::LessEqual, {"<=", "lessThanEqual"}},
|
||||||
|
{CompareOp::GreaterThan, {">", "greaterThan"}},
|
||||||
|
{CompareOp::GreaterEqual, {">=", "greaterThanEqual"}}};
|
||||||
|
|
||||||
|
const CompareOp op_x = instr.common.compare_op.x.Value();
|
||||||
|
const CompareOp op_y = instr.common.compare_op.y.Value();
|
||||||
|
|
||||||
|
if (cmp_ops.find(op_x) == cmp_ops.end()) {
|
||||||
|
LOG_ERROR(HW_GPU, "Unknown compare mode %x", static_cast<int>(op_x));
|
||||||
|
} else if (cmp_ops.find(op_y) == cmp_ops.end()) {
|
||||||
|
LOG_ERROR(HW_GPU, "Unknown compare mode %x", static_cast<int>(op_y));
|
||||||
|
} else if (op_x != op_y) {
|
||||||
|
shader.AddLine("conditional_code.x = " + src1 + ".x " +
|
||||||
|
cmp_ops.find(op_x)->second.first + " " + src2 + ".x;");
|
||||||
|
shader.AddLine("conditional_code.y = " + src1 + ".y " +
|
||||||
|
cmp_ops.find(op_y)->second.first + " " + src2 + ".y;");
|
||||||
|
} else {
|
||||||
|
shader.AddLine("conditional_code = " + cmp_ops.find(op_x)->second.second +
|
||||||
|
"(vec2(" + src1 + "), vec2(" + src2 + "));");
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::EX2: {
|
||||||
|
SetDest(swizzle, dest_reg, "exp2(" + src1 + ".x)", 4, 1);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::LG2: {
|
||||||
|
SetDest(swizzle, dest_reg, "log2(" + src1 + ".x)", 4, 1);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
default: {
|
||||||
|
LOG_ERROR(HW_GPU, "Unhandled arithmetic instruction: 0x%02x (%s): 0x%08x",
|
||||||
|
(int)instr.opcode.Value().EffectiveOpCode(),
|
||||||
|
instr.opcode.Value().GetInfo().name, instr.hex);
|
||||||
|
DEBUG_ASSERT(false);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Type::MultiplyAdd: {
|
||||||
|
if ((instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MAD) ||
|
||||||
|
(instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI)) {
|
||||||
|
bool is_inverted = (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI);
|
||||||
|
|
||||||
|
std::string src1 = swizzle.negate_src1 ? "-" : "";
|
||||||
|
src1 += GetSourceRegister(instr.mad.GetSrc1(is_inverted), 0);
|
||||||
|
src1 += "." + GetSelectorSrc1(swizzle);
|
||||||
|
|
||||||
|
std::string src2 = swizzle.negate_src2 ? "-" : "";
|
||||||
|
src2 += GetSourceRegister(instr.mad.GetSrc2(is_inverted),
|
||||||
|
!is_inverted * instr.mad.address_register_index);
|
||||||
|
src2 += "." + GetSelectorSrc2(swizzle);
|
||||||
|
|
||||||
|
std::string src3 = swizzle.negate_src3 ? "-" : "";
|
||||||
|
src3 += GetSourceRegister(instr.mad.GetSrc3(is_inverted),
|
||||||
|
is_inverted * instr.mad.address_register_index);
|
||||||
|
src3 += "." + GetSelectorSrc3(swizzle);
|
||||||
|
|
||||||
|
std::string dest_reg =
|
||||||
|
(instr.mad.dest.Value() < 0x10)
|
||||||
|
? outputreg_getter(static_cast<u32>(instr.mad.dest.Value().GetIndex()))
|
||||||
|
: (instr.mad.dest.Value() < 0x20)
|
||||||
|
? "reg_tmp" + std::to_string(instr.mad.dest.Value().GetIndex())
|
||||||
|
: "";
|
||||||
|
|
||||||
|
if (sanitize_mul) {
|
||||||
|
SetDest(swizzle, dest_reg, "sanitize_mul(" + src1 + ", " + src2 + ") + " + src3,
|
||||||
|
4, 4);
|
||||||
|
} else {
|
||||||
|
SetDest(swizzle, dest_reg, src1 + " * " + src2 + " + " + src3, 4, 4);
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
LOG_ERROR(HW_GPU, "Unhandled multiply-add instruction: 0x%02x (%s): 0x%08x",
|
||||||
|
(int)instr.opcode.Value().EffectiveOpCode(),
|
||||||
|
instr.opcode.Value().GetInfo().name, instr.hex);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
default: {
|
||||||
|
switch (instr.opcode.Value()) {
|
||||||
|
case OpCode::Id::END: {
|
||||||
|
shader.AddLine("return true;");
|
||||||
|
offset = PROGRAM_END - 1;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::JMPC:
|
||||||
|
case OpCode::Id::JMPU: {
|
||||||
|
std::string condition;
|
||||||
|
if (instr.opcode.Value() == OpCode::Id::JMPC) {
|
||||||
|
condition = EvaluateCondition(instr.flow_control);
|
||||||
|
} else {
|
||||||
|
bool invert_test = instr.flow_control.num_instructions & 1;
|
||||||
|
condition = (invert_test ? "!" : "") +
|
||||||
|
GetUniformBool(instr.flow_control.bool_uniform_id);
|
||||||
|
}
|
||||||
|
|
||||||
|
shader.AddLine("if (" + condition + ") {");
|
||||||
|
++shader.scope;
|
||||||
|
shader.AddLine("{ jmp_to = " + std::to_string(instr.flow_control.dest_offset) +
|
||||||
|
"u; break; }");
|
||||||
|
|
||||||
|
--shader.scope;
|
||||||
|
shader.AddLine("}");
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::CALL:
|
||||||
|
case OpCode::Id::CALLC:
|
||||||
|
case OpCode::Id::CALLU: {
|
||||||
|
std::string condition;
|
||||||
|
if (instr.opcode.Value() == OpCode::Id::CALLC) {
|
||||||
|
condition = EvaluateCondition(instr.flow_control);
|
||||||
|
} else if (instr.opcode.Value() == OpCode::Id::CALLU) {
|
||||||
|
condition = GetUniformBool(instr.flow_control.bool_uniform_id);
|
||||||
|
}
|
||||||
|
|
||||||
|
shader.AddLine(condition.empty() ? "{" : "if (" + condition + ") {");
|
||||||
|
++shader.scope;
|
||||||
|
|
||||||
|
auto& call_sub = GetSubroutine(instr.flow_control.dest_offset,
|
||||||
|
instr.flow_control.dest_offset +
|
||||||
|
instr.flow_control.num_instructions);
|
||||||
|
|
||||||
|
CallSubroutine(call_sub);
|
||||||
|
if (instr.opcode.Value() == OpCode::Id::CALL &&
|
||||||
|
call_sub.exit_method == ExitMethod::AlwaysEnd) {
|
||||||
|
offset = PROGRAM_END - 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
--shader.scope;
|
||||||
|
shader.AddLine("}");
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::NOP: {
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::IFC:
|
||||||
|
case OpCode::Id::IFU: {
|
||||||
|
std::string condition;
|
||||||
|
if (instr.opcode.Value() == OpCode::Id::IFC) {
|
||||||
|
condition = EvaluateCondition(instr.flow_control);
|
||||||
|
} else {
|
||||||
|
condition = GetUniformBool(instr.flow_control.bool_uniform_id);
|
||||||
|
}
|
||||||
|
|
||||||
|
const u32 if_offset = offset + 1;
|
||||||
|
const u32 else_offset = instr.flow_control.dest_offset;
|
||||||
|
const u32 endif_offset =
|
||||||
|
instr.flow_control.dest_offset + instr.flow_control.num_instructions;
|
||||||
|
|
||||||
|
shader.AddLine("if (" + condition + ") {");
|
||||||
|
++shader.scope;
|
||||||
|
|
||||||
|
auto& if_sub = GetSubroutine(if_offset, else_offset);
|
||||||
|
CallSubroutine(if_sub);
|
||||||
|
offset = else_offset - 1;
|
||||||
|
|
||||||
|
if (instr.flow_control.num_instructions != 0) {
|
||||||
|
--shader.scope;
|
||||||
|
shader.AddLine("} else {");
|
||||||
|
++shader.scope;
|
||||||
|
|
||||||
|
auto& else_sub = GetSubroutine(else_offset, endif_offset);
|
||||||
|
CallSubroutine(else_sub);
|
||||||
|
offset = endif_offset - 1;
|
||||||
|
|
||||||
|
if (if_sub.exit_method == ExitMethod::AlwaysEnd &&
|
||||||
|
else_sub.exit_method == ExitMethod::AlwaysEnd) {
|
||||||
|
offset = PROGRAM_END - 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
--shader.scope;
|
||||||
|
shader.AddLine("}");
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::LOOP: {
|
||||||
|
std::string int_uniform =
|
||||||
|
"uniforms.i[" + std::to_string(instr.flow_control.int_uniform_id) + "]";
|
||||||
|
|
||||||
|
shader.AddLine("address_registers.z = int(" + int_uniform + ".y);");
|
||||||
|
|
||||||
|
std::string loop_var = "loop" + std::to_string(offset);
|
||||||
|
shader.AddLine("for (uint " + loop_var + " = 0u; " + loop_var +
|
||||||
|
" <= " + int_uniform + ".x; address_registers.z += int(" +
|
||||||
|
int_uniform + ".z), ++" + loop_var + ") {");
|
||||||
|
++shader.scope;
|
||||||
|
|
||||||
|
auto& loop_sub = GetSubroutine(offset + 1, instr.flow_control.dest_offset + 1);
|
||||||
|
CallSubroutine(loop_sub);
|
||||||
|
offset = instr.flow_control.dest_offset;
|
||||||
|
|
||||||
|
--shader.scope;
|
||||||
|
shader.AddLine("}");
|
||||||
|
|
||||||
|
if (loop_sub.exit_method == ExitMethod::AlwaysEnd) {
|
||||||
|
offset = PROGRAM_END - 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::EMIT: {
|
||||||
|
if (is_gs) {
|
||||||
|
shader.AddLine("emit();");
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OpCode::Id::SETEMIT: {
|
||||||
|
if (is_gs) {
|
||||||
|
ASSERT(instr.setemit.vertex_id < 3);
|
||||||
|
shader.AddLine("setemit(" + std::to_string(instr.setemit.vertex_id) + "u, " +
|
||||||
|
((instr.setemit.prim_emit != 0) ? "true" : "false") + ", " +
|
||||||
|
((instr.setemit.winding != 0) ? "true" : "false") + ");");
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
default: {
|
||||||
|
LOG_ERROR(HW_GPU, "Unhandled instruction: 0x%02x (%s): 0x%08x",
|
||||||
|
(int)instr.opcode.Value().EffectiveOpCode(),
|
||||||
|
instr.opcode.Value().GetInfo().name, instr.hex);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return offset + 1;
|
||||||
|
};
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Compiles a range of instructions from PICA to GLSL.
|
||||||
|
* @param begin the offset of the starting instruction.
|
||||||
|
* @param end the offset where the compilation should stop (exclusive).
|
||||||
|
* @return the offset of the next instruction to compile. PROGRAM_END if the program terminates.
|
||||||
|
*/
|
||||||
|
u32 CompileRange(u32 begin, u32 end) {
|
||||||
|
u32 program_counter;
|
||||||
|
for (program_counter = begin; program_counter < (begin > end ? PROGRAM_END : end);) {
|
||||||
|
program_counter = CompileInstr(program_counter);
|
||||||
|
}
|
||||||
|
return program_counter;
|
||||||
|
};
|
||||||
|
|
||||||
|
void Generate() {
|
||||||
|
if (sanitize_mul) {
|
||||||
|
shader.AddLine("vec4 sanitize_mul(vec4 lhs, vec4 rhs) {");
|
||||||
|
++shader.scope;
|
||||||
|
shader.AddLine("vec4 product = lhs * rhs;");
|
||||||
|
shader.AddLine("return mix(product, mix(mix(vec4(0.0), product, isnan(rhs)), product, "
|
||||||
|
"isnan(lhs)), isnan(product));");
|
||||||
|
--shader.scope;
|
||||||
|
shader.AddLine("}\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
// Add declarations for registers
|
||||||
|
shader.AddLine("bvec2 conditional_code = bvec2(false);");
|
||||||
|
shader.AddLine("ivec3 address_registers = ivec3(0);");
|
||||||
|
for (int i = 0; i < 16; ++i) {
|
||||||
|
shader.AddLine("vec4 reg_tmp" + std::to_string(i) + " = vec4(0.0, 0.0, 0.0, 1.0);");
|
||||||
|
}
|
||||||
|
shader.AddLine("");
|
||||||
|
|
||||||
|
// Add declarations for all subroutines
|
||||||
|
for (const auto& subroutine : subroutines) {
|
||||||
|
shader.AddLine("bool " + subroutine.GetName() + "();");
|
||||||
|
}
|
||||||
|
shader.AddLine("");
|
||||||
|
|
||||||
|
// Add the main entry point
|
||||||
|
shader.AddLine("bool exec_shader() {");
|
||||||
|
++shader.scope;
|
||||||
|
CallSubroutine(GetSubroutine(main_offset, PROGRAM_END));
|
||||||
|
--shader.scope;
|
||||||
|
shader.AddLine("}\n");
|
||||||
|
|
||||||
|
// Add definitions for all subroutines
|
||||||
|
for (const auto& subroutine : subroutines) {
|
||||||
|
std::set<u32> labels = subroutine.labels;
|
||||||
|
|
||||||
|
shader.AddLine("bool " + subroutine.GetName() + "() {");
|
||||||
|
++shader.scope;
|
||||||
|
|
||||||
|
if (labels.empty()) {
|
||||||
|
if (CompileRange(subroutine.begin, subroutine.end) != PROGRAM_END) {
|
||||||
|
shader.AddLine("return false;");
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
labels.insert(subroutine.begin);
|
||||||
|
shader.AddLine("uint jmp_to = " + std::to_string(subroutine.begin) + "u;");
|
||||||
|
shader.AddLine("while (true) {");
|
||||||
|
++shader.scope;
|
||||||
|
|
||||||
|
shader.AddLine("switch (jmp_to) {");
|
||||||
|
|
||||||
|
for (auto label : labels) {
|
||||||
|
shader.AddLine("case " + std::to_string(label) + "u: {");
|
||||||
|
++shader.scope;
|
||||||
|
|
||||||
|
auto next_it = labels.lower_bound(label + 1);
|
||||||
|
u32 next_label = next_it == labels.end() ? subroutine.end : *next_it;
|
||||||
|
|
||||||
|
u32 compile_end = CompileRange(label, next_label);
|
||||||
|
if (compile_end > next_label && compile_end != PROGRAM_END) {
|
||||||
|
// This happens only when there is a label inside a IF/LOOP block
|
||||||
|
shader.AddLine("{ jmp_to = " + std::to_string(compile_end) + "u; break; }");
|
||||||
|
labels.emplace(compile_end);
|
||||||
|
}
|
||||||
|
|
||||||
|
--shader.scope;
|
||||||
|
shader.AddLine("}");
|
||||||
|
}
|
||||||
|
|
||||||
|
shader.AddLine("default: return false;");
|
||||||
|
shader.AddLine("}");
|
||||||
|
|
||||||
|
--shader.scope;
|
||||||
|
shader.AddLine("}");
|
||||||
|
|
||||||
|
shader.AddLine("return false;");
|
||||||
|
}
|
||||||
|
|
||||||
|
--shader.scope;
|
||||||
|
shader.AddLine("}\n");
|
||||||
|
|
||||||
|
ASSERT(shader.scope == 0);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
private:
|
||||||
|
const std::set<Subroutine>& subroutines;
|
||||||
|
const ProgramCode& program_code;
|
||||||
|
const SwizzleData& swizzle_data;
|
||||||
|
const u32 main_offset;
|
||||||
|
const RegGetter& inputreg_getter;
|
||||||
|
const RegGetter& outputreg_getter;
|
||||||
|
const bool sanitize_mul;
|
||||||
|
const bool is_gs;
|
||||||
|
|
||||||
|
ShaderWriter shader;
|
||||||
|
};
|
||||||
|
|
||||||
|
std::string GetCommonDeclarations() {
|
||||||
|
return R"(
|
||||||
|
struct pica_uniforms {
|
||||||
|
bool b[16];
|
||||||
|
uvec4 i[4];
|
||||||
|
vec4 f[96];
|
||||||
|
};
|
||||||
|
|
||||||
|
bool exec_shader();
|
||||||
|
|
||||||
|
)";
|
||||||
|
}
|
||||||
|
|
||||||
|
std::string DecompileProgram(const ProgramCode& program_code, const SwizzleData& swizzle_data,
|
||||||
|
u32 main_offset, const RegGetter& inputreg_getter,
|
||||||
|
const RegGetter& outputreg_getter, bool sanitize_mul, bool is_gs) {
|
||||||
|
|
||||||
|
auto subroutines = ControlFlowAnalyzer(program_code, main_offset).GetSubroutines();
|
||||||
|
GLSLGenerator generator(subroutines, program_code, swizzle_data, main_offset, inputreg_getter,
|
||||||
|
outputreg_getter, sanitize_mul, is_gs);
|
||||||
|
return generator.GetShaderCode();
|
||||||
|
}
|
||||||
|
|
||||||
|
} // namespace Decompiler
|
||||||
|
} // namespace Shader
|
||||||
|
} // namespace Pica
|
||||||
@ -0,0 +1,27 @@
|
|||||||
|
// Copyright 2017 Citra Emulator Project
|
||||||
|
// Licensed under GPLv2 or any later version
|
||||||
|
// Refer to the license.txt file included.
|
||||||
|
|
||||||
|
#include <array>
|
||||||
|
#include <functional>
|
||||||
|
#include <string>
|
||||||
|
#include "common/common_types.h"
|
||||||
|
#include "video_core/shader/shader.h"
|
||||||
|
|
||||||
|
namespace Pica {
|
||||||
|
namespace Shader {
|
||||||
|
namespace Decompiler {
|
||||||
|
|
||||||
|
using ProgramCode = std::array<u32, MAX_PROGRAM_CODE_LENGTH>;
|
||||||
|
using SwizzleData = std::array<u32, MAX_SWIZZLE_DATA_LENGTH>;
|
||||||
|
using RegGetter = std::function<std::string(u32)>;
|
||||||
|
|
||||||
|
std::string GetCommonDeclarations();
|
||||||
|
|
||||||
|
std::string DecompileProgram(const ProgramCode& program_code, const SwizzleData& swizzle_data,
|
||||||
|
u32 main_offset, const RegGetter& inputreg_getter,
|
||||||
|
const RegGetter& outputreg_getter, bool sanitize_mul, bool is_gs);
|
||||||
|
|
||||||
|
} // namespace Decompiler
|
||||||
|
} // namespace Shader
|
||||||
|
} // namespace Pica
|
||||||
Loading…
Reference in New Issue