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@ -31,6 +31,7 @@ namespace Vulkan {
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using Tegra::Texture::SWIZZLE_TABLE;
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using Tegra::Texture::ASTC::EncodingsValues;
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using namespace Tegra::Texture::ASTC;
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namespace {
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@ -214,7 +215,6 @@ std::array<VkDescriptorUpdateTemplateEntryKHR, 8> BuildASTCPassDescriptorUpdateT
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struct AstcPushConstants {
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std::array<u32, 2> num_image_blocks;
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std::array<u32, 2> blocks_dims;
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u32 layer;
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VideoCommon::Accelerated::BlockLinearSwizzle2DParams params;
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};
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@ -226,6 +226,7 @@ struct AstcBufferData {
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decltype(REPLICATE_8_BIT_TO_8_TABLE) replicate_8_to_8 = REPLICATE_8_BIT_TO_8_TABLE;
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decltype(REPLICATE_BYTE_TO_16_TABLE) replicate_byte_to_16 = REPLICATE_BYTE_TO_16_TABLE;
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} constexpr ASTC_BUFFER_DATA;
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} // Anonymous namespace
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VKComputePass::VKComputePass(const Device& device, VKDescriptorPool& descriptor_pool,
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@ -403,7 +404,6 @@ std::pair<VkBuffer, VkDeviceSize> QuadIndexedPass::Assemble(
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return {staging.buffer, staging.offset};
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}
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using namespace Tegra::Texture::ASTC;
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ASTCDecoderPass::ASTCDecoderPass(const Device& device_, VKScheduler& scheduler_,
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VKDescriptorPool& descriptor_pool_,
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StagingBufferPool& staging_buffer_pool_,
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@ -464,76 +464,94 @@ void ASTCDecoderPass::Assemble(Image& image, const StagingBufferRef& map,
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if (!data_buffer) {
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MakeDataBuffer();
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}
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const VkImageAspectFlags aspect_mask = image.AspectMask();
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const VkImage vk_image = image.Handle();
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const bool is_initialized = image.ExchangeInitialization();
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scheduler.Record([vk_image, aspect_mask, is_initialized](vk::CommandBuffer cmdbuf) {
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const VkImageMemoryBarrier image_barrier{
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.sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,
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.pNext = nullptr,
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.srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
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.dstAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT,
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.oldLayout = is_initialized ? VK_IMAGE_LAYOUT_GENERAL : VK_IMAGE_LAYOUT_UNDEFINED,
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.newLayout = VK_IMAGE_LAYOUT_GENERAL,
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.srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
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.dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
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.image = vk_image,
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.subresourceRange{
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.aspectMask = aspect_mask,
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.baseMipLevel = 0,
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.levelCount = VK_REMAINING_MIP_LEVELS,
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.baseArrayLayer = 0,
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.layerCount = VK_REMAINING_ARRAY_LAYERS,
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},
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};
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cmdbuf.PipelineBarrier(0, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, 0, image_barrier);
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});
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const std::array<u32, 2> block_dims{tile_size.width, tile_size.height};
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for (s32 layer = 0; layer < image.info.resources.layers; layer++) {
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for (const VideoCommon::SwizzleParameters& swizzle : swizzles) {
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const size_t input_offset = swizzle.buffer_offset + map.offset;
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const auto num_dispatches_x = Common::DivCeil(swizzle.num_tiles.width, 32U);
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const auto num_dispatches_y = Common::DivCeil(swizzle.num_tiles.height, 32U);
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const std::array num_image_blocks{swizzle.num_tiles.width, swizzle.num_tiles.height};
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const u32 layer_image_size =
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image.guest_size_bytes - static_cast<u32>(swizzle.buffer_offset);
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for (const VideoCommon::SwizzleParameters& swizzle : swizzles) {
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const size_t input_offset = swizzle.buffer_offset + map.offset;
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const u32 num_dispatches_x = Common::DivCeil(swizzle.num_tiles.width, 32U);
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const u32 num_dispatches_y = Common::DivCeil(swizzle.num_tiles.height, 32U);
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const u32 num_dispatches_z = image.info.resources.layers;
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const std::array num_image_blocks{swizzle.num_tiles.width, swizzle.num_tiles.height};
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const u32 layer_image_size =
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image.guest_size_bytes - static_cast<u32>(swizzle.buffer_offset);
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update_descriptor_queue.Acquire();
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update_descriptor_queue.AddBuffer(*data_buffer,
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offsetof(AstcBufferData, swizzle_table_buffer),
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sizeof(AstcBufferData::swizzle_table_buffer));
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update_descriptor_queue.AddBuffer(map.buffer, input_offset, image.guest_size_bytes);
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update_descriptor_queue.AddBuffer(*data_buffer,
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offsetof(AstcBufferData, encoding_values),
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sizeof(AstcBufferData::encoding_values));
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update_descriptor_queue.AddBuffer(*data_buffer,
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offsetof(AstcBufferData, replicate_6_to_8),
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sizeof(AstcBufferData::replicate_6_to_8));
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update_descriptor_queue.AddBuffer(*data_buffer,
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offsetof(AstcBufferData, replicate_7_to_8),
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sizeof(AstcBufferData::replicate_7_to_8));
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update_descriptor_queue.AddBuffer(*data_buffer,
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offsetof(AstcBufferData, replicate_8_to_8),
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sizeof(AstcBufferData::replicate_8_to_8));
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update_descriptor_queue.AddBuffer(*data_buffer,
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offsetof(AstcBufferData, replicate_byte_to_16),
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sizeof(AstcBufferData::replicate_byte_to_16));
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update_descriptor_queue.AddImage(image.StorageImageView());
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update_descriptor_queue.Acquire();
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update_descriptor_queue.AddBuffer(*data_buffer,
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offsetof(AstcBufferData, swizzle_table_buffer),
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sizeof(AstcBufferData::swizzle_table_buffer));
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update_descriptor_queue.AddBuffer(map.buffer, input_offset, layer_image_size);
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update_descriptor_queue.AddBuffer(*data_buffer, offsetof(AstcBufferData, encoding_values),
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sizeof(AstcBufferData::encoding_values));
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update_descriptor_queue.AddBuffer(*data_buffer, offsetof(AstcBufferData, replicate_6_to_8),
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sizeof(AstcBufferData::replicate_6_to_8));
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update_descriptor_queue.AddBuffer(*data_buffer, offsetof(AstcBufferData, replicate_7_to_8),
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sizeof(AstcBufferData::replicate_7_to_8));
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update_descriptor_queue.AddBuffer(*data_buffer, offsetof(AstcBufferData, replicate_8_to_8),
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sizeof(AstcBufferData::replicate_8_to_8));
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update_descriptor_queue.AddBuffer(*data_buffer,
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offsetof(AstcBufferData, replicate_byte_to_16),
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sizeof(AstcBufferData::replicate_byte_to_16));
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update_descriptor_queue.AddImage(image.StorageImageView(swizzle.level));
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const VkDescriptorSet set = CommitDescriptorSet(update_descriptor_queue);
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// To unswizzle the ASTC data
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const auto params = MakeBlockLinearSwizzle2DParams(swizzle, image.info);
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scheduler.Record([layout = *layout, pipeline = *pipeline, buffer = map.buffer,
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num_dispatches_x, num_dispatches_y, layer_image_size,
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num_image_blocks, block_dims, layer, params, set,
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image = image.Handle(), input_offset,
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aspect_mask = image.AspectMask()](vk::CommandBuffer cmdbuf) {
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const AstcPushConstants uniforms{num_image_blocks, block_dims, layer, params};
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cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, pipeline);
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cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, set, {});
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cmdbuf.PushConstants(layout, VK_SHADER_STAGE_COMPUTE_BIT, uniforms);
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cmdbuf.Dispatch(num_dispatches_x, num_dispatches_y, 1);
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const VkImageMemoryBarrier image_barrier{
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.sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,
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.pNext = nullptr,
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.srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
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.dstAccessMask = VK_ACCESS_SHADER_READ_BIT,
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.oldLayout = VK_IMAGE_LAYOUT_UNDEFINED,
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.newLayout = VK_IMAGE_LAYOUT_GENERAL,
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.srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
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.dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
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.image = image,
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.subresourceRange{
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.aspectMask = aspect_mask,
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.baseMipLevel = 0,
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.levelCount = VK_REMAINING_MIP_LEVELS,
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.baseArrayLayer = 0,
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.layerCount = VK_REMAINING_ARRAY_LAYERS,
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},
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};
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cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
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VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT, 0, image_barrier);
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});
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}
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const VkDescriptorSet set = CommitDescriptorSet(update_descriptor_queue);
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const VkPipelineLayout vk_layout = *layout;
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const VkPipeline vk_pipeline = *pipeline;
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// To unswizzle the ASTC data
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const auto params = MakeBlockLinearSwizzle2DParams(swizzle, image.info);
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scheduler.Record([vk_layout, vk_pipeline, buffer = map.buffer, num_dispatches_x,
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num_dispatches_y, num_dispatches_z, num_image_blocks, block_dims, params,
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set, input_offset](vk::CommandBuffer cmdbuf) {
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const AstcPushConstants uniforms{num_image_blocks, block_dims, params};
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cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, vk_pipeline);
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cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, vk_layout, 0, set, {});
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cmdbuf.PushConstants(vk_layout, VK_SHADER_STAGE_COMPUTE_BIT, uniforms);
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cmdbuf.Dispatch(num_dispatches_x, num_dispatches_y, num_dispatches_z);
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});
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}
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scheduler.Record([vk_image, aspect_mask](vk::CommandBuffer cmdbuf) {
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const VkImageMemoryBarrier image_barrier{
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.sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,
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.pNext = nullptr,
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.srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
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.dstAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT,
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.oldLayout = VK_IMAGE_LAYOUT_GENERAL,
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.newLayout = VK_IMAGE_LAYOUT_GENERAL,
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.srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
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.dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
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.image = vk_image,
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.subresourceRange{
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.aspectMask = aspect_mask,
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.baseMipLevel = 0,
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.levelCount = VK_REMAINING_MIP_LEVELS,
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.baseArrayLayer = 0,
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.layerCount = VK_REMAINING_ARRAY_LAYERS,
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},
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};
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cmdbuf.PipelineBarrier(0, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, 0, image_barrier);
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});
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}
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} // namespace Vulkan
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