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@ -76,6 +76,17 @@ OutputVertex OutputRegisters::ToVertex(const Regs::ShaderConfig& config) const {
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return ret;
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}
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void UnitState::LoadInputVertex(const InputVertex& input, int num_attributes) {
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// Setup input register table
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const auto& attribute_register_map = g_state.regs.vs.input_register_map;
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for (int i = 0; i < num_attributes; i++)
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registers.input[attribute_register_map.GetRegisterForAttribute(i)] = input.attr[i];
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conditional_code[0] = false;
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conditional_code[1] = false;
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}
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#ifdef ARCHITECTURE_x86_64
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static std::unordered_map<u64, std::unique_ptr<JitShader>> shader_map;
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static const JitShader* jit_shader;
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@ -109,21 +120,12 @@ void ShaderSetup::Setup() {
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MICROPROFILE_DEFINE(GPU_Shader, "GPU", "Shader", MP_RGB(50, 50, 240));
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void ShaderSetup::Run(UnitState& state, const InputVertex& input, int num_attributes) {
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void ShaderSetup::Run(UnitState& state) {
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auto& config = g_state.regs.vs;
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auto& setup = g_state.vs;
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MICROPROFILE_SCOPE(GPU_Shader);
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// Setup input register table
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const auto& attribute_register_map = config.input_register_map;
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for (int i = 0; i < num_attributes; i++)
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state.registers.input[attribute_register_map.GetRegisterForAttribute(i)] = input.attr[i];
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state.conditional_code[0] = false;
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state.conditional_code[1] = false;
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#ifdef ARCHITECTURE_x86_64
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if (VideoCore::g_shader_jit_enabled) {
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jit_shader->Run(setup, state, config.main_offset);
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@ -145,13 +147,7 @@ DebugData<true> ShaderSetup::ProduceDebugInfo(const InputVertex& input, int num_
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// Setup input register table
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boost::fill(state.registers.input, Math::Vec4<float24>::AssignToAll(float24::Zero()));
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const auto& attribute_register_map = config.input_register_map;
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for (int i = 0; i < num_attributes; i++)
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state.registers.input[attribute_register_map.GetRegisterForAttribute(i)] = input.attr[i];
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state.conditional_code[0] = false;
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state.conditional_code[1] = false;
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state.LoadInputVertex(input, num_attributes);
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RunInterpreter(setup, state, debug_data, config.main_offset);
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return debug_data;
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}
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