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@ -200,12 +200,12 @@ ComputePass::~ComputePass() = default;
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Uint8Pass::Uint8Pass(const Device& device_, Scheduler& scheduler_, DescriptorPool& descriptor_pool,
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StagingBufferPool& staging_buffer_pool_,
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UpdateDescriptorQueue& update_descriptor_queue_)
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ComputePassDescriptorQueue& compute_pass_descriptor_queue_)
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: ComputePass(device_, descriptor_pool, INPUT_OUTPUT_DESCRIPTOR_SET_BINDINGS,
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INPUT_OUTPUT_DESCRIPTOR_UPDATE_TEMPLATE, INPUT_OUTPUT_BANK_INFO, {},
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VULKAN_UINT8_COMP_SPV),
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scheduler{scheduler_}, staging_buffer_pool{staging_buffer_pool_},
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update_descriptor_queue{update_descriptor_queue_} {}
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compute_pass_descriptor_queue{compute_pass_descriptor_queue_} {}
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Uint8Pass::~Uint8Pass() = default;
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@ -214,10 +214,10 @@ std::pair<VkBuffer, VkDeviceSize> Uint8Pass::Assemble(u32 num_vertices, VkBuffer
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const u32 staging_size = static_cast<u32>(num_vertices * sizeof(u16));
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const auto staging = staging_buffer_pool.Request(staging_size, MemoryUsage::DeviceLocal);
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update_descriptor_queue.Acquire();
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update_descriptor_queue.AddBuffer(src_buffer, src_offset, num_vertices);
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update_descriptor_queue.AddBuffer(staging.buffer, staging.offset, staging_size);
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const void* const descriptor_data{update_descriptor_queue.UpdateData()};
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compute_pass_descriptor_queue.Acquire();
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compute_pass_descriptor_queue.AddBuffer(src_buffer, src_offset, num_vertices);
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compute_pass_descriptor_queue.AddBuffer(staging.buffer, staging.offset, staging_size);
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const void* const descriptor_data{compute_pass_descriptor_queue.UpdateData()};
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scheduler.RequestOutsideRenderPassOperationContext();
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scheduler.Record([this, descriptor_data, num_vertices](vk::CommandBuffer cmdbuf) {
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@ -242,12 +242,12 @@ std::pair<VkBuffer, VkDeviceSize> Uint8Pass::Assemble(u32 num_vertices, VkBuffer
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QuadIndexedPass::QuadIndexedPass(const Device& device_, Scheduler& scheduler_,
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DescriptorPool& descriptor_pool_,
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StagingBufferPool& staging_buffer_pool_,
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UpdateDescriptorQueue& update_descriptor_queue_)
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ComputePassDescriptorQueue& compute_pass_descriptor_queue_)
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: ComputePass(device_, descriptor_pool_, INPUT_OUTPUT_DESCRIPTOR_SET_BINDINGS,
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INPUT_OUTPUT_DESCRIPTOR_UPDATE_TEMPLATE, INPUT_OUTPUT_BANK_INFO,
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COMPUTE_PUSH_CONSTANT_RANGE<sizeof(u32) * 3>, VULKAN_QUAD_INDEXED_COMP_SPV),
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scheduler{scheduler_}, staging_buffer_pool{staging_buffer_pool_},
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update_descriptor_queue{update_descriptor_queue_} {}
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compute_pass_descriptor_queue{compute_pass_descriptor_queue_} {}
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QuadIndexedPass::~QuadIndexedPass() = default;
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@ -272,10 +272,10 @@ std::pair<VkBuffer, VkDeviceSize> QuadIndexedPass::Assemble(
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const std::size_t staging_size = num_tri_vertices * sizeof(u32);
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const auto staging = staging_buffer_pool.Request(staging_size, MemoryUsage::DeviceLocal);
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update_descriptor_queue.Acquire();
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update_descriptor_queue.AddBuffer(src_buffer, src_offset, input_size);
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update_descriptor_queue.AddBuffer(staging.buffer, staging.offset, staging_size);
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const void* const descriptor_data{update_descriptor_queue.UpdateData()};
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compute_pass_descriptor_queue.Acquire();
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compute_pass_descriptor_queue.AddBuffer(src_buffer, src_offset, input_size);
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compute_pass_descriptor_queue.AddBuffer(staging.buffer, staging.offset, staging_size);
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const void* const descriptor_data{compute_pass_descriptor_queue.UpdateData()};
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scheduler.RequestOutsideRenderPassOperationContext();
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scheduler.Record([this, descriptor_data, num_tri_vertices, base_vertex, index_shift,
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@ -304,13 +304,14 @@ std::pair<VkBuffer, VkDeviceSize> QuadIndexedPass::Assemble(
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ASTCDecoderPass::ASTCDecoderPass(const Device& device_, Scheduler& scheduler_,
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DescriptorPool& descriptor_pool_,
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StagingBufferPool& staging_buffer_pool_,
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UpdateDescriptorQueue& update_descriptor_queue_,
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ComputePassDescriptorQueue& compute_pass_descriptor_queue_,
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MemoryAllocator& memory_allocator_)
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: ComputePass(device_, descriptor_pool_, ASTC_DESCRIPTOR_SET_BINDINGS,
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ASTC_PASS_DESCRIPTOR_UPDATE_TEMPLATE_ENTRY, ASTC_BANK_INFO,
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COMPUTE_PUSH_CONSTANT_RANGE<sizeof(AstcPushConstants)>, ASTC_DECODER_COMP_SPV),
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scheduler{scheduler_}, staging_buffer_pool{staging_buffer_pool_},
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update_descriptor_queue{update_descriptor_queue_}, memory_allocator{memory_allocator_} {}
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compute_pass_descriptor_queue{compute_pass_descriptor_queue_}, memory_allocator{
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memory_allocator_} {}
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ASTCDecoderPass::~ASTCDecoderPass() = default;
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@ -358,11 +359,11 @@ void ASTCDecoderPass::Assemble(Image& image, const StagingBufferRef& map,
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const u32 num_dispatches_y = Common::DivCeil(swizzle.num_tiles.height, 8U);
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const u32 num_dispatches_z = image.info.resources.layers;
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update_descriptor_queue.Acquire();
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update_descriptor_queue.AddBuffer(map.buffer, input_offset,
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image.guest_size_bytes - swizzle.buffer_offset);
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update_descriptor_queue.AddImage(image.StorageImageView(swizzle.level));
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const void* const descriptor_data{update_descriptor_queue.UpdateData()};
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compute_pass_descriptor_queue.Acquire();
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compute_pass_descriptor_queue.AddBuffer(map.buffer, input_offset,
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image.guest_size_bytes - swizzle.buffer_offset);
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compute_pass_descriptor_queue.AddImage(image.StorageImageView(swizzle.level));
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const void* const descriptor_data{compute_pass_descriptor_queue.UpdateData()};
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// To unswizzle the ASTC data
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const auto params = MakeBlockLinearSwizzle2DParams(swizzle, image.info);
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