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@ -5,7 +5,6 @@
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#include <memory>
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#include <memory>
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#include <dynarmic/interface/A32/a32.h>
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#include <dynarmic/interface/A32/a32.h>
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#include <dynarmic/interface/A32/config.h>
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#include <dynarmic/interface/A32/config.h>
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#include <dynarmic/interface/A32/context.h>
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#include "common/assert.h"
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#include "common/assert.h"
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#include "common/literals.h"
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#include "common/literals.h"
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#include "common/logging/log.h"
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#include "common/logging/log.h"
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@ -410,21 +409,19 @@ void ARM_Dynarmic_32::SetTPIDR_EL0(u64 value) {
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}
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}
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void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) {
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void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) {
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Dynarmic::A32::Context context;
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Dynarmic::A32::Jit* j = jit.load();
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jit.load()->SaveContext(context);
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ctx.cpu_registers = j->Regs();
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ctx.cpu_registers = context.Regs();
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ctx.extension_registers = j->ExtRegs();
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ctx.extension_registers = context.ExtRegs();
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ctx.cpsr = j->Cpsr();
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ctx.cpsr = context.Cpsr();
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ctx.fpscr = j->Fpscr();
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ctx.fpscr = context.Fpscr();
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}
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}
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void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) {
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void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) {
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Dynarmic::A32::Context context;
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Dynarmic::A32::Jit* j = jit.load();
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context.Regs() = ctx.cpu_registers;
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j->Regs() = ctx.cpu_registers;
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context.ExtRegs() = ctx.extension_registers;
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j->ExtRegs() = ctx.extension_registers;
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context.SetCpsr(ctx.cpsr);
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j->SetCpsr(ctx.cpsr);
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context.SetFpscr(ctx.fpscr);
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j->SetFpscr(ctx.fpscr);
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jit.load()->LoadContext(context);
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}
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}
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void ARM_Dynarmic_32::SignalInterrupt() {
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void ARM_Dynarmic_32::SignalInterrupt() {
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