CCF_100
/
suyu-mirror
mirror of https://git.suyu.dev/suyu/suyu
1
0
Fork 0
Code Issues Releases Wiki Activity

shader/control_flow: Specify constness on caller lambdas 

Update src/video_core/shader/control_flow.cpp

Co-Authored-By: Mat M. <mathew1800@gmail.com>

Update src/video_core/shader/control_flow.cpp

Co-Authored-By: Mat M. <mathew1800@gmail.com>

Update src/video_core/shader/control_flow.cpp

Co-Authored-By: Mat M. <mathew1800@gmail.com>

Update src/video_core/shader/control_flow.cpp

Co-Authored-By: Mat M. <mathew1800@gmail.com>

Update src/video_core/shader/control_flow.cpp

Co-Authored-By: Mat M. <mathew1800@gmail.com>

Update src/video_core/shader/control_flow.cpp

Co-Authored-By: Mat M. <mathew1800@gmail.com>
merge-requests/60/head
Rodrigo Locatti 2019-10-28 02:40:53 +07:00 committed by ReinUsesLisp
parent 7b069252f8
commit ff5a0f370c
No known key found for this signature in database
GPG Key ID: 2DFC508897B39CFE
1 changed files with 12 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
src/video_core/shader/control_flow.cpp
Unescape Escape View File

@ -182,12 +182,12 @@ std::optional<std::pair<BufferInfo, u64>> TrackLDC(const CFGRebuildState& state,
u64 brx_tracked_register) { u64 brx_tracked_register) {
return TrackInstruction<std::pair<BufferInfo, u64>>( return TrackInstruction<std::pair<BufferInfo, u64>>(
state, pos, state, pos,
[brx_tracked_register](auto instr, auto& opcode) { [brx_tracked_register](auto instr, const auto& opcode) {
return opcode.GetId() == OpCode::Id::LD_C && return opcode.GetId() == OpCode::Id::LD_C &&
instr.gpr0.Value() == brx_tracked_register && instr.gpr0.Value() == brx_tracked_register &&
instr.ld_c.type.Value() == Tegra::Shader::UniformType::Single; instr.ld_c.type.Value() == Tegra::Shader::UniformType::Single;
}, },
[](auto instr, auto& opcode) { [](auto instr, const auto& opcode) {
const BufferInfo info = {static_cast<u32>(instr.cbuf36.index.Value()), const BufferInfo info = {static_cast<u32>(instr.cbuf36.index.Value()),
static_cast<u32>(instr.cbuf36.GetOffset())}; static_cast<u32>(instr.cbuf36.GetOffset())};
return std::make_pair(info, instr.gpr8.Value()); return std::make_pair(info, instr.gpr8.Value());
@ -197,22 +197,23 @@ std::optional<std::pair<BufferInfo, u64>> TrackLDC(const CFGRebuildState& state,
std::optional<u64> TrackSHLRegister(const CFGRebuildState& state, u32& pos, std::optional<u64> TrackSHLRegister(const CFGRebuildState& state, u32& pos,
u64 ldc_tracked_register) { u64 ldc_tracked_register) {
return TrackInstruction<u64>(state, pos, return TrackInstruction<u64>(state, pos,
[ldc_tracked_register](auto instr, auto& opcode) { [ldc_tracked_register](auto instr, const auto& opcode) {
return opcode.GetId() == OpCode::Id::SHL_IMM && return opcode.GetId() == OpCode::Id::SHL_IMM &&
instr.gpr0.Value() == ldc_tracked_register; instr.gpr0.Value() == ldc_tracked_register;
}, },
[](auto instr, auto&) { return instr.gpr8.Value(); }); [](auto instr, const auto&) { return instr.gpr8.Value(); });
} }
std::optional<u32> TrackIMNMXValue(const CFGRebuildState& state, u32& pos, std::optional<u32> TrackIMNMXValue(const CFGRebuildState& state, u32& pos,
u64 shl_tracked_register) { u64 shl_tracked_register) {
return TrackInstruction<u32>( return TrackInstruction<u32>(state, pos,
state, pos, [shl_tracked_register](auto instr, const auto& opcode) {
[shl_tracked_register](auto instr, auto& opcode) { return opcode.GetId() == OpCode::Id::IMNMX_IMM &&
return opcode.GetId() == OpCode::Id::IMNMX_IMM && instr.gpr0.Value() == shl_tracked_register;
instr.gpr0.Value() == shl_tracked_register; },
}, [](auto instr, const auto&) {
[](auto instr, auto&) { return static_cast<u32>(instr.alu.GetSignedImm20_20() + 1); }); return static_cast<u32>(instr.alu.GetSignedImm20_20() + 1);
});
} }
std::optional<BranchIndirectInfo> TrackBranchIndirectInfo(const CFGRebuildState& state, u32 pos) { std::optional<BranchIndirectInfo> TrackBranchIndirectInfo(const CFGRebuildState& state, u32 pos) {