GPU: Process command mode 5 (IncreaseOnce) differently from other commands.

Accumulate all arguments before calling the desired method.

Note: Maybe we should do the same for the NonIncreasing mode?
master
Subv 2018-03-16 20:32:44 +07:00
parent cde9386e0f
commit 29feece4b8
9 changed files with 97 additions and 8 deletions

@ -64,6 +64,35 @@ void GPU::WriteReg(u32 method, u32 subchannel, u32 value) {
} }
} }
void GPU::CallMethod(u32 method, u32 subchannel, const std::vector<u32>& parameters) {
LOG_WARNING(HW_GPU, "Processing method %08X on subchannel %u num params %zu", method,
subchannel, parameters.size());
if (method < static_cast<u32>(BufferMethods::CountBufferMethods)) {
// TODO(Subv): Research and implement these methods.
LOG_ERROR(HW_GPU, "Special buffer methods other than Bind are not implemented");
return;
}
ASSERT(bound_engines.find(subchannel) != bound_engines.end());
const EngineID engine = bound_engines[subchannel];
switch (engine) {
case EngineID::FERMI_TWOD_A:
fermi_2d->CallMethod(method, parameters);
break;
case EngineID::MAXWELL_B:
maxwell_3d->CallMethod(method, parameters);
break;
case EngineID::MAXWELL_COMPUTE_B:
maxwell_compute->CallMethod(method, parameters);
break;
default:
UNIMPLEMENTED();
}
}
void GPU::ProcessCommandList(GPUVAddr address, u32 size) { void GPU::ProcessCommandList(GPUVAddr address, u32 size) {
// TODO(Subv): PhysicalToVirtualAddress is a misnomer, it converts a GPU VAddr into an // TODO(Subv): PhysicalToVirtualAddress is a misnomer, it converts a GPU VAddr into an
// application VAddr. // application VAddr.
@ -96,13 +125,17 @@ void GPU::ProcessCommandList(GPUVAddr address, u32 size) {
ASSERT(header.arg_count.Value() >= 1); ASSERT(header.arg_count.Value() >= 1);
// Use the original method for the first argument and then the next method for all other // Use the original method for the first argument and then the next method for all other
// arguments. // arguments.
WriteReg(header.method, header.subchannel, Memory::Read32(current_addr));
current_addr += sizeof(u32); // Process this command as a method call instead of a register write. Gather
// Use the same method value for all arguments. // all the parameters first and then pass them at once to the CallMethod function.
for (unsigned i = 1; i < header.arg_count; ++i) { std::vector<u32> parameters(header.arg_count);
WriteReg(header.method + 1, header.subchannel, Memory::Read32(current_addr));
for (unsigned i = 0; i < header.arg_count; ++i) {
parameters[i] = Memory::Read32(current_addr);
current_addr += sizeof(u32); current_addr += sizeof(u32);
} }
CallMethod(header.method, header.subchannel, parameters);
break; break;
} }
case SubmissionMode::Inline: { case SubmissionMode::Inline: {

@ -34,6 +34,4 @@ static_assert(std::is_standard_layout<CommandHeader>::value == true,
"CommandHeader does not use standard layout"); "CommandHeader does not use standard layout");
static_assert(sizeof(CommandHeader) == sizeof(u32), "CommandHeader has incorrect size!"); static_assert(sizeof(CommandHeader) == sizeof(u32), "CommandHeader has incorrect size!");
void ProcessCommandList(VAddr address, u32 size);
} // namespace Tegra } // namespace Tegra

@ -8,6 +8,7 @@ namespace Tegra {
namespace Engines { namespace Engines {
void Fermi2D::WriteReg(u32 method, u32 value) {} void Fermi2D::WriteReg(u32 method, u32 value) {}
void Fermi2D::CallMethod(u32 method, const std::vector<u32>& parameters) {}
} // namespace Engines } // namespace Engines
} // namespace Tegra } // namespace Tegra

@ -4,6 +4,7 @@
#pragma once #pragma once
#include <vector>
#include "common/common_types.h" #include "common/common_types.h"
namespace Tegra { namespace Tegra {
@ -16,6 +17,13 @@ public:
/// Write the value to the register identified by method. /// Write the value to the register identified by method.
void WriteReg(u32 method, u32 value); void WriteReg(u32 method, u32 value);
/**
* Handles a method call to this engine.
* @param method Method to call
* @param parameters Arguments to the method call
*/
void CallMethod(u32 method, const std::vector<u32>& parameters);
}; };
} // namespace Engines } // namespace Engines

@ -8,8 +8,23 @@
namespace Tegra { namespace Tegra {
namespace Engines { namespace Engines {
const std::unordered_map<u32, Maxwell3D::MethodInfo> Maxwell3D::method_handlers = {
{0xE24, {"PrepareShader", 5, &Maxwell3D::PrepareShader}},
};
Maxwell3D::Maxwell3D(MemoryManager& memory_manager) : memory_manager(memory_manager) {} Maxwell3D::Maxwell3D(MemoryManager& memory_manager) : memory_manager(memory_manager) {}
void Maxwell3D::CallMethod(u32 method, const std::vector<u32>& parameters) {
auto itr = method_handlers.find(method);
if (itr == method_handlers.end()) {
LOG_ERROR(HW_GPU, "Unhandled method call %08X", method);
return;
}
ASSERT(itr->second.arguments == parameters.size());
(this->*itr->second.handler)(parameters);
}
void Maxwell3D::WriteReg(u32 method, u32 value) { void Maxwell3D::WriteReg(u32 method, u32 value) {
ASSERT_MSG(method < Regs::NUM_REGS, ASSERT_MSG(method < Regs::NUM_REGS,
"Invalid Maxwell3D register, increase the size of the Regs structure"); "Invalid Maxwell3D register, increase the size of the Regs structure");
@ -56,5 +71,7 @@ void Maxwell3D::DrawArrays() {
LOG_WARNING(HW_GPU, "Game requested a DrawArrays, ignoring"); LOG_WARNING(HW_GPU, "Game requested a DrawArrays, ignoring");
} }
void Maxwell3D::PrepareShader(const std::vector<u32>& parameters) {}
} // namespace Engines } // namespace Engines
} // namespace Tegra } // namespace Tegra

@ -4,6 +4,8 @@
#pragma once #pragma once
#include <unordered_map>
#include <vector>
#include "common/bit_field.h" #include "common/bit_field.h"
#include "common/common_funcs.h" #include "common/common_funcs.h"
#include "common/common_types.h" #include "common/common_types.h"
@ -20,6 +22,13 @@ public:
/// Write the value to the register identified by method. /// Write the value to the register identified by method.
void WriteReg(u32 method, u32 value); void WriteReg(u32 method, u32 value);
/**
* Handles a method call to this engine.
* @param method Method to call
* @param parameters Arguments to the method call
*/
void CallMethod(u32 method, const std::vector<u32>& parameters);
/// Register structure of the Maxwell3D engine. /// Register structure of the Maxwell3D engine.
/// TODO(Subv): This structure will need to be made bigger as more registers are discovered. /// TODO(Subv): This structure will need to be made bigger as more registers are discovered.
struct Regs { struct Regs {
@ -63,13 +72,24 @@ public:
static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32), "Maxwell3D Regs has wrong size"); static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32), "Maxwell3D Regs has wrong size");
private: private:
MemoryManager& memory_manager;
/// Handles a write to the QUERY_GET register. /// Handles a write to the QUERY_GET register.
void ProcessQueryGet(); void ProcessQueryGet();
/// Handles a write to the VERTEX_END_GL register, triggering a draw. /// Handles a write to the VERTEX_END_GL register, triggering a draw.
void DrawArrays(); void DrawArrays();
MemoryManager& memory_manager; /// Method call handlers
void PrepareShader(const std::vector<u32>& parameters);
struct MethodInfo {
const char* name;
u32 arguments;
void (Maxwell3D::*handler)(const std::vector<u32>& parameters);
};
static const std::unordered_map<u32, MethodInfo> method_handlers;
}; };
#define ASSERT_REG_POSITION(field_name, position) \ #define ASSERT_REG_POSITION(field_name, position) \

@ -8,6 +8,7 @@ namespace Tegra {
namespace Engines { namespace Engines {
void MaxwellCompute::WriteReg(u32 method, u32 value) {} void MaxwellCompute::WriteReg(u32 method, u32 value) {}
void MaxwellCompute::CallMethod(u32 method, const std::vector<u32>& parameters) {}
} // namespace Engines } // namespace Engines
} // namespace Tegra } // namespace Tegra

@ -4,6 +4,7 @@
#pragma once #pragma once
#include <vector>
#include "common/common_types.h" #include "common/common_types.h"
namespace Tegra { namespace Tegra {
@ -16,6 +17,13 @@ public:
/// Write the value to the register identified by method. /// Write the value to the register identified by method.
void WriteReg(u32 method, u32 value); void WriteReg(u32 method, u32 value);
/**
* Handles a method call to this engine.
* @param method Method to call
* @param parameters Arguments to the method call
*/
void CallMethod(u32 method, const std::vector<u32>& parameters);
}; };
} // namespace Engines } // namespace Engines

@ -41,6 +41,9 @@ private:
/// Writes a single register in the engine bound to the specified subchannel /// Writes a single register in the engine bound to the specified subchannel
void WriteReg(u32 method, u32 subchannel, u32 value); void WriteReg(u32 method, u32 subchannel, u32 value);
/// Calls a method in the engine bound to the specified subchannel with the input parameters.
void CallMethod(u32 method, u32 subchannel, const std::vector<u32>& parameters);
/// Mapping of command subchannels to their bound engine ids. /// Mapping of command subchannels to their bound engine ids.
std::unordered_map<u32, EngineID> bound_engines; std::unordered_map<u32, EngineID> bound_engines;