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@ -53,7 +53,6 @@ void MaxwellDMA::Launch() {
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// TODO(Subv): Perform more research and implement all features of this engine.
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// TODO(Subv): Perform more research and implement all features of this engine.
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const LaunchDMA& launch = regs.launch_dma;
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const LaunchDMA& launch = regs.launch_dma;
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ASSERT(launch.semaphore_type == LaunchDMA::SemaphoreType::NONE);
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ASSERT(launch.interrupt_type == LaunchDMA::InterruptType::NONE);
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ASSERT(launch.interrupt_type == LaunchDMA::InterruptType::NONE);
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ASSERT(launch.data_transfer_type == LaunchDMA::DataTransferType::NON_PIPELINED);
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ASSERT(launch.data_transfer_type == LaunchDMA::DataTransferType::NON_PIPELINED);
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ASSERT(regs.dst_params.origin.x == 0);
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ASSERT(regs.dst_params.origin.x == 0);
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@ -79,6 +78,7 @@ void MaxwellDMA::Launch() {
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CopyPitchToBlockLinear();
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CopyPitchToBlockLinear();
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}
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}
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}
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}
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ReleaseSemaphore();
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}
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}
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void MaxwellDMA::CopyPitchToPitch() {
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void MaxwellDMA::CopyPitchToPitch() {
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@ -244,4 +244,22 @@ void MaxwellDMA::FastCopyBlockLinearToPitch() {
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memory_manager.WriteBlock(regs.offset_out, write_buffer.data(), dst_size);
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memory_manager.WriteBlock(regs.offset_out, write_buffer.data(), dst_size);
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}
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}
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void MaxwellDMA::ReleaseSemaphore() {
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const auto type = regs.launch_dma.semaphore_type;
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const GPUVAddr address = regs.semaphore.address;
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switch (type) {
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case LaunchDMA::SemaphoreType::NONE:
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break;
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case LaunchDMA::SemaphoreType::RELEASE_ONE_WORD_SEMAPHORE:
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memory_manager.Write<u32>(address, regs.semaphore.payload);
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break;
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case LaunchDMA::SemaphoreType::RELEASE_FOUR_WORD_SEMAPHORE:
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memory_manager.Write<u64>(address, static_cast<u64>(regs.semaphore.payload));
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memory_manager.Write<u64>(address + 8, system.GPU().GetTicks());
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break;
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default:
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UNREACHABLE_MSG("Unknown semaphore type: {}", static_cast<u32>(type.Value()));
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}
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}
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} // namespace Tegra::Engines
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} // namespace Tegra::Engines
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