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@ -70,7 +70,7 @@ struct Regs {
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INSERT_PADDING_WORDS(0x9);
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INSERT_PADDING_WORDS(0x9);
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BitField<0, 24, u32> viewport_depth_range; // float24
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BitField<0, 24, u32> viewport_depth_range; // float24
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BitField<0, 24, u32> viewport_depth_far_plane; // float24
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BitField<0, 24, u32> viewport_depth_near_plane; // float24
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BitField<0, 3, u32> vs_output_total;
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BitField<0, 3, u32> vs_output_total;
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@ -122,7 +122,20 @@ struct Regs {
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BitField<16, 10, s32> y;
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BitField<16, 10, s32> y;
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} viewport_corner;
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} viewport_corner;
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INSERT_PADDING_WORDS(0x17);
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INSERT_PADDING_WORDS(0x1);
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//TODO: early depth
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INSERT_PADDING_WORDS(0x1);
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INSERT_PADDING_WORDS(0x2);
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enum DepthBuffering : u32 {
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WBuffering = 0,
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ZBuffering = 1,
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};
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BitField< 0, 1, DepthBuffering> depthmap_enable;
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INSERT_PADDING_WORDS(0x12);
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struct TextureConfig {
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struct TextureConfig {
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enum WrapMode : u32 {
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enum WrapMode : u32 {
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@ -1279,10 +1292,11 @@ ASSERT_REG_POSITION(cull_mode, 0x40);
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ASSERT_REG_POSITION(viewport_size_x, 0x41);
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ASSERT_REG_POSITION(viewport_size_x, 0x41);
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ASSERT_REG_POSITION(viewport_size_y, 0x43);
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ASSERT_REG_POSITION(viewport_size_y, 0x43);
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ASSERT_REG_POSITION(viewport_depth_range, 0x4d);
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ASSERT_REG_POSITION(viewport_depth_range, 0x4d);
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ASSERT_REG_POSITION(viewport_depth_far_plane, 0x4e);
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ASSERT_REG_POSITION(viewport_depth_near_plane, 0x4e);
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ASSERT_REG_POSITION(vs_output_attributes[0], 0x50);
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ASSERT_REG_POSITION(vs_output_attributes[0], 0x50);
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ASSERT_REG_POSITION(vs_output_attributes[1], 0x51);
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ASSERT_REG_POSITION(vs_output_attributes[1], 0x51);
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ASSERT_REG_POSITION(viewport_corner, 0x68);
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ASSERT_REG_POSITION(viewport_corner, 0x68);
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ASSERT_REG_POSITION(depthmap_enable, 0x6D);
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ASSERT_REG_POSITION(texture0_enable, 0x80);
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ASSERT_REG_POSITION(texture0_enable, 0x80);
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ASSERT_REG_POSITION(texture0, 0x81);
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ASSERT_REG_POSITION(texture0, 0x81);
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ASSERT_REG_POSITION(texture0_format, 0x8e);
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ASSERT_REG_POSITION(texture0_format, 0x8e);
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