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shader_ir: Implement LD_S 

Loads from shared memory.
master
ReinUsesLisp 2019-08-09 15:35:28 +07:00
parent f17415d431
commit 4de04eba39
1 changed files with 13 additions and 10 deletions
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23
src/video_core/shader/decode/memory.cpp
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@ -106,16 +106,17 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
} }
break; break;
} }
case OpCode::Id::LD_L: { case OpCode::Id::LD_L:
LOG_DEBUG(HW_GPU, "LD_L cache management mode: {}", LOG_DEBUG(HW_GPU, "LD_L cache management mode: {}", static_cast<u64>(instr.ld_l.unknown));
static_cast<u64>(instr.ld_l.unknown.Value())); [[fallthrough]];
case OpCode::Id::LD_S: {
const auto GetLmem = [&](s32 offset) { const auto GetMemory = [&](s32 offset) {
ASSERT(offset % 4 == 0); ASSERT(offset % 4 == 0);
const Node immediate_offset = Immediate(static_cast<s32>(instr.smem_imm) + offset); const Node immediate_offset = Immediate(static_cast<s32>(instr.smem_imm) + offset);
const Node address = Operation(OperationCode::IAdd, NO_PRECISE, GetRegister(instr.gpr8), const Node address = Operation(OperationCode::IAdd, NO_PRECISE, GetRegister(instr.gpr8),
immediate_offset); immediate_offset);
return GetLocalMemory(address); return opcode->get().GetId() == OpCode::Id::LD_S ? GetSharedMemory(address)
: GetLocalMemory(address);
}; };
switch (instr.ldst_sl.type.Value()) { switch (instr.ldst_sl.type.Value()) {
@ -135,14 +136,16 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
return 0; return 0;
} }
}(); }();
for (u32 i = 0; i < count; ++i) for (u32 i = 0; i < count; ++i) {
SetTemporary(bb, i, GetLmem(i * 4)); SetTemporary(bb, i, GetMemory(i * 4));
for (u32 i = 0; i < count; ++i) }
for (u32 i = 0; i < count; ++i) {
SetRegister(bb, instr.gpr0.Value() + i, GetTemporary(i)); SetRegister(bb, instr.gpr0.Value() + i, GetTemporary(i));
}
break; break;
} }
default: default:
UNIMPLEMENTED_MSG("LD_L Unhandled type: {}", UNIMPLEMENTED_MSG("{} Unhandled type: {}", opcode->get().GetName(),
static_cast<u32>(instr.ldst_sl.type.Value())); static_cast<u32>(instr.ldst_sl.type.Value()));
} }
break; break;