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@ -3100,7 +3100,6 @@ mainswitch:
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break;
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break;
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case 0x68: /* Store Word, No WriteBack, Post Inc, Reg. */
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case 0x68: /* Store Word, No WriteBack, Post Inc, Reg. */
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//ichfly PKHBT PKHTB todo check this
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if ((instr & 0x70) == 0x10) { //pkhbt
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if ((instr & 0x70) == 0x10) { //pkhbt
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u8 idest = BITS(12, 15);
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u8 idest = BITS(12, 15);
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u8 rfis = BITS(16, 19);
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u8 rfis = BITS(16, 19);
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@ -3109,18 +3108,11 @@ mainswitch:
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state->Reg[idest] = (state->Reg[rfis] & 0xFFFF) | ((state->Reg[rlast] << ishi) & 0xFFFF0000);
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state->Reg[idest] = (state->Reg[rfis] & 0xFFFF) | ((state->Reg[rlast] << ishi) & 0xFFFF0000);
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break;
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break;
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} else if ((instr & 0x70) == 0x50) { //pkhtb
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} else if ((instr & 0x70) == 0x50) { //pkhtb
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const u8 rd_idx = BITS(12, 15);
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u8 rd_idx = BITS(12, 15);
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const u8 rn_idx = BITS(16, 19);
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u8 rn_idx = BITS(16, 19);
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const u8 rm_idx = BITS(0, 3);
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u8 rm_idx = BITS(0, 3);
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const u8 imm5 = BITS(7, 11);
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u8 imm5 = BITS(7, 11) ? BITS(7, 11) : 31;
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state->Reg[rd_idx] = ((static_cast<s32>(state->Reg[rm_idx]) >> imm5) & 0xFFFF) | ((state->Reg[rn_idx]) & 0xFFFF0000);
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ARMword val;
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if (imm5 >= 32)
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val = (state->Reg[rm_idx] >> 31);
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else
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val = (state->Reg[rm_idx] >> imm5);
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state->Reg[rd_idx] = (val & 0xFFFF) | ((state->Reg[rn_idx]) & 0xFFFF0000);
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break;
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break;
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} else if (BIT (4)) {
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} else if (BIT (4)) {
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#ifdef MODE32
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#ifdef MODE32
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