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@ -2820,10 +2820,12 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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operand2 = (BIT(RS, 15)) ? (BITS(RS, 0, 15) | 0xffff0000) : BITS(RS, 0, 15);
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else
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operand2 = (BIT(RS, 31)) ? (BITS(RS, 16, 31) | 0xffff0000) : BITS(RS, 16, 31);
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RD = operand1 * operand2 + RN;
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if (AddOverflow(operand1 * operand2, RN, RD))
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u32 product = operand1 * operand2;
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u32 result = product + RN;
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if (AddOverflow(product, RN, result))
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cpu->Cpsr |= (1 << 27);
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RD = result;
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}
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cpu->Reg[15] += cpu->GetInstructionSize();
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INC_PC(sizeof(smla_inst));
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