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@ -91,11 +91,45 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
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break;
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}
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case OpCode::Id::BRA: {
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UNIMPLEMENTED_IF_MSG(instr.bra.constant_buffer != 0,
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"BRA with constant buffers are not implemented");
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Node branch;
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if (instr.bra.constant_buffer == 0) {
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const u32 target = pc + instr.bra.GetBranchTarget();
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branch = Operation(OperationCode::Branch, Immediate(target));
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} else {
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const u32 target = pc + 1;
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const Node op_a = GetConstBuffer(instr.cbuf36.index, instr.cbuf36.GetOffset());
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const Node convert = SignedOperation(OperationCode::IArithmeticShiftRight,
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true, PRECISE, op_a, Immediate(3));
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const Node operand = Operation(OperationCode::IAdd, PRECISE, convert, Immediate(target));
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branch = Operation(OperationCode::BranchIndirect, convert);
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}
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const u32 target = pc + instr.bra.GetBranchTarget();
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const Node branch = Operation(OperationCode::Branch, Immediate(target));
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const Tegra::Shader::ConditionCode cc = instr.flow_condition_code;
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if (cc != Tegra::Shader::ConditionCode::T) {
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bb.push_back(Conditional(GetConditionCode(cc), {branch}));
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} else {
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bb.push_back(branch);
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}
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break;
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}
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case OpCode::Id::BRX: {
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Node operand;
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if (instr.brx.constant_buffer != 0) {
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const s32 target = pc + 1;
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const Node index = GetRegister(instr.gpr8);
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const Node op_a =
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GetConstBufferIndirect(instr.cbuf36.index, instr.cbuf36.GetOffset() + 0, index);
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const Node convert = SignedOperation(OperationCode::IArithmeticShiftRight,
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true, PRECISE, op_a, Immediate(3));
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operand = Operation(OperationCode::IAdd, PRECISE, convert, Immediate(target));
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} else {
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const s32 target = pc + instr.brx.GetBranchExtend();
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const Node op_a = GetRegister(instr.gpr8);
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const Node convert = SignedOperation(OperationCode::IArithmeticShiftRight,
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true, PRECISE, op_a, Immediate(3));
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operand = Operation(OperationCode::IAdd, PRECISE, convert, Immediate(target));
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}
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const Node branch = Operation(OperationCode::BranchIndirect, operand);
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const Tegra::Shader::ConditionCode cc = instr.flow_condition_code;
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if (cc != Tegra::Shader::ConditionCode::T) {
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