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@ -118,6 +118,9 @@ void ARM_Interpreter::SaveContext(ThreadContext& ctx) {
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ctx.fpscr = state->VFP[1];
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ctx.fpscr = state->VFP[1];
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ctx.fpexc = state->VFP[2];
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ctx.fpexc = state->VFP[2];
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ctx.reg_15 = state->Reg[15];
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ctx.mode = state->NextInstr;
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}
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}
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/**
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/**
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@ -137,8 +140,8 @@ void ARM_Interpreter::LoadContext(const ThreadContext& ctx) {
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state->VFP[1] = ctx.fpscr;
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state->VFP[1] = ctx.fpscr;
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state->VFP[2] = ctx.fpexc;
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state->VFP[2] = ctx.fpexc;
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state->Reg[15] = ctx.pc;
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state->Reg[15] = ctx.reg_15;
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state->NextInstr = RESUME;
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state->NextInstr = ctx.mode;
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}
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}
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/// Prepare core for thread reschedule (if needed to correctly handle state)
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/// Prepare core for thread reschedule (if needed to correctly handle state)
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