arm_dynarmic: Use HaltReason for svc calls and reschedules

master
merry 2022-04-03 18:20:11 +07:00
parent f8b8af47ad
commit a5d040df3d
4 changed files with 19 additions and 27 deletions

@ -25,6 +25,9 @@ namespace Core {
using namespace Common::Literals;
constexpr Dynarmic::HaltReason break_loop = Dynarmic::HaltReason::UserDefined2;
constexpr Dynarmic::HaltReason svc_call = Dynarmic::HaltReason::UserDefined3;
class DynarmicCallbacks32 : public Dynarmic::A32::UserCallbacks {
public:
explicit DynarmicCallbacks32(ARM_Dynarmic_32& parent_)
@ -82,9 +85,8 @@ public:
}
void CallSVC(u32 swi) override {
parent.svc_called = true;
parent.svc_swi = swi;
parent.jit->HaltExecution();
parent.jit->HaltExecution(svc_call);
}
void AddTicks(u64 ticks) override {
@ -219,12 +221,10 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
void ARM_Dynarmic_32::Run() {
while (true) {
const auto hr = jit->Run();
if (!svc_called) {
break;
}
svc_called = false;
if (Has(hr, svc_call)) {
Kernel::Svc::Call(system, svc_swi);
if (shutdown || Has(hr, Dynarmic::HaltReason::UserDefined2)) {
}
if (Has(hr, break_loop)) {
break;
}
}
@ -310,12 +310,11 @@ void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) {
}
void ARM_Dynarmic_32::PrepareReschedule() {
jit->HaltExecution();
shutdown = true;
jit->HaltExecution(break_loop);
}
void ARM_Dynarmic_32::SignalInterrupt() {
jit->HaltExecution(Dynarmic::HaltReason::UserDefined2);
jit->HaltExecution(break_loop);
}
void ARM_Dynarmic_32::ClearInstructionCache() {

@ -84,9 +84,6 @@ private:
// SVC callback
u32 svc_swi{};
bool svc_called{};
bool shutdown{};
};
} // namespace Core

@ -26,6 +26,9 @@ namespace Core {
using Vector = Dynarmic::A64::Vector;
using namespace Common::Literals;
constexpr Dynarmic::HaltReason break_loop = Dynarmic::HaltReason::UserDefined2;
constexpr Dynarmic::HaltReason svc_call = Dynarmic::HaltReason::UserDefined3;
class DynarmicCallbacks64 : public Dynarmic::A64::UserCallbacks {
public:
explicit DynarmicCallbacks64(ARM_Dynarmic_64& parent_)
@ -105,7 +108,7 @@ public:
break;
}
parent.jit->HaltExecution();
parent.jit->HaltExecution(Dynarmic::HaltReason::CacheInvalidation);
}
void ExceptionRaised(u64 pc, Dynarmic::A64::Exception exception) override {
@ -124,9 +127,8 @@ public:
}
void CallSVC(u32 swi) override {
parent.svc_called = true;
parent.svc_swi = swi;
parent.jit->HaltExecution();
parent.jit->HaltExecution(svc_call);
}
void AddTicks(u64 ticks) override {
@ -280,12 +282,10 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
void ARM_Dynarmic_64::Run() {
while (true) {
const auto hr = jit->Run();
if (!svc_called) {
break;
}
svc_called = false;
if (Has(hr, svc_call)) {
Kernel::Svc::Call(system, svc_swi);
if (shutdown || Has(hr, Dynarmic::HaltReason::UserDefined2)) {
}
if (Has(hr, break_loop)) {
break;
}
}
@ -376,12 +376,11 @@ void ARM_Dynarmic_64::LoadContext(const ThreadContext64& ctx) {
}
void ARM_Dynarmic_64::PrepareReschedule() {
jit->HaltExecution();
shutdown = true;
jit->HaltExecution(break_loop);
}
void ARM_Dynarmic_64::SignalInterrupt() {
jit->HaltExecution(Dynarmic::HaltReason::UserDefined2);
jit->HaltExecution(break_loop);
}
void ARM_Dynarmic_64::ClearInstructionCache() {

@ -78,9 +78,6 @@ private:
// SVC callback
u32 svc_swi{};
bool svc_called{};
bool shutdown{};
};
} // namespace Core