Merge pull request #762 from yuriks/memmap
Memory: Use a table based lookup scheme to read from memory regionsmaster
Yuri Kunde Schlesner
commit
bb68933894
@ -1,283 +0,0 @@
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// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <map>
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#include "common/common_types.h"
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#include "common/logging/log.h"
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#include "common/swap.h"
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#include "core/mem_map.h"
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#include "core/hw/hw.h"
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#include "hle/config_mem.h"
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#include "hle/shared_page.h"
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namespace Memory {
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static std::map<u32, MemoryBlock> heap_map;
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static std::map<u32, MemoryBlock> heap_linear_map;
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PAddr VirtualToPhysicalAddress(const VAddr addr) {
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if (addr == 0) {
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return 0;
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} else if (addr >= VRAM_VADDR && addr < VRAM_VADDR_END) {
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return addr - VRAM_VADDR + VRAM_PADDR;
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} else if (addr >= LINEAR_HEAP_VADDR && addr < LINEAR_HEAP_VADDR_END) {
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return addr - LINEAR_HEAP_VADDR + FCRAM_PADDR;
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} else if (addr >= DSP_RAM_VADDR && addr < DSP_RAM_VADDR_END) {
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return addr - DSP_RAM_VADDR + DSP_RAM_PADDR;
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} else if (addr >= IO_AREA_VADDR && addr < IO_AREA_VADDR_END) {
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return addr - IO_AREA_VADDR + IO_AREA_PADDR;
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}
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LOG_ERROR(HW_Memory, "Unknown virtual address @ 0x%08x", addr);
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// To help with debugging, set bit on address so that it's obviously invalid.
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return addr | 0x80000000;
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}
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VAddr PhysicalToVirtualAddress(const PAddr addr) {
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if (addr == 0) {
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return 0;
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} else if (addr >= VRAM_PADDR && addr < VRAM_PADDR_END) {
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return addr - VRAM_PADDR + VRAM_VADDR;
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} else if (addr >= FCRAM_PADDR && addr < FCRAM_PADDR_END) {
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return addr - FCRAM_PADDR + LINEAR_HEAP_VADDR;
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} else if (addr >= DSP_RAM_PADDR && addr < DSP_RAM_PADDR_END) {
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return addr - DSP_RAM_PADDR + DSP_RAM_VADDR;
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} else if (addr >= IO_AREA_PADDR && addr < IO_AREA_PADDR_END) {
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return addr - IO_AREA_PADDR + IO_AREA_VADDR;
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}
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LOG_ERROR(HW_Memory, "Unknown physical address @ 0x%08x", addr);
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// To help with debugging, set bit on address so that it's obviously invalid.
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return addr | 0x80000000;
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}
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template <typename T>
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inline void Read(T &var, const VAddr vaddr) {
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// TODO: Figure out the fastest order of tests for both read and write (they are probably different).
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// TODO: Make sure this represents the mirrors in a correct way.
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// Could just do a base-relative read, too.... TODO
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// Kernel memory command buffer
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if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
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var = *((const T*)&g_tls_mem[vaddr - TLS_AREA_VADDR]);
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// ExeFS:/.code is loaded here
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} else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
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var = *((const T*)&g_exefs_code[vaddr - PROCESS_IMAGE_VADDR]);
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// FCRAM - linear heap
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} else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
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var = *((const T*)&g_heap_linear[vaddr - LINEAR_HEAP_VADDR]);
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// FCRAM - application heap
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} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
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var = *((const T*)&g_heap[vaddr - HEAP_VADDR]);
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// Shared memory
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} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
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var = *((const T*)&g_shared_mem[vaddr - SHARED_MEMORY_VADDR]);
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// Config memory
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} else if ((vaddr >= CONFIG_MEMORY_VADDR) && (vaddr < CONFIG_MEMORY_VADDR_END)) {
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ConfigMem::Read<T>(var, vaddr);
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// Shared page
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} else if ((vaddr >= SHARED_PAGE_VADDR) && (vaddr < SHARED_PAGE_VADDR_END)) {
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SharedPage::Read<T>(var, vaddr);
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// DSP memory
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} else if ((vaddr >= DSP_RAM_VADDR) && (vaddr < DSP_RAM_VADDR_END)) {
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var = *((const T*)&g_dsp_mem[vaddr - DSP_RAM_VADDR]);
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// VRAM
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} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
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var = *((const T*)&g_vram[vaddr - VRAM_VADDR]);
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} else {
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LOG_ERROR(HW_Memory, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, vaddr);
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}
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}
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template <typename T>
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inline void Write(const VAddr vaddr, const T data) {
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// Kernel memory command buffer
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if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
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*(T*)&g_tls_mem[vaddr - TLS_AREA_VADDR] = data;
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// ExeFS:/.code is loaded here
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} else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
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*(T*)&g_exefs_code[vaddr - PROCESS_IMAGE_VADDR] = data;
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// FCRAM - linear heap
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} else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
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*(T*)&g_heap_linear[vaddr - LINEAR_HEAP_VADDR] = data;
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// FCRAM - application heap
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} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
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*(T*)&g_heap[vaddr - HEAP_VADDR] = data;
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// Shared memory
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} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
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*(T*)&g_shared_mem[vaddr - SHARED_MEMORY_VADDR] = data;
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// VRAM
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} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
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*(T*)&g_vram[vaddr - VRAM_VADDR] = data;
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// DSP memory
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} else if ((vaddr >= DSP_RAM_VADDR) && (vaddr < DSP_RAM_VADDR_END)) {
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*(T*)&g_dsp_mem[vaddr - DSP_RAM_VADDR] = data;
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//} else if ((vaddr & 0xFFFF0000) == 0x1FF80000) {
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// ASSERT_MSG(MEMMAP, false, "umimplemented write to Configuration Memory");
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//} else if ((vaddr & 0xFFFFF000) == 0x1FF81000) {
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// ASSERT_MSG(MEMMAP, false, "umimplemented write to shared page");
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// Error out...
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} else {
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LOG_ERROR(HW_Memory, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, vaddr);
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}
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}
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u8 *GetPointer(const VAddr vaddr) {
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// Kernel memory command buffer
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if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
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return g_tls_mem + (vaddr - TLS_AREA_VADDR);
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// ExeFS:/.code is loaded here
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} else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
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return g_exefs_code + (vaddr - PROCESS_IMAGE_VADDR);
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// FCRAM - linear heap
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} else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
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return g_heap_linear + (vaddr - LINEAR_HEAP_VADDR);
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// FCRAM - application heap
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} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
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return g_heap + (vaddr - HEAP_VADDR);
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// Shared memory
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} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
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return g_shared_mem + (vaddr - SHARED_MEMORY_VADDR);
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// VRAM
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} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
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return g_vram + (vaddr - VRAM_VADDR);
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} else {
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LOG_ERROR(HW_Memory, "unknown GetPointer @ 0x%08x", vaddr);
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return 0;
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}
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}
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u32 MapBlock_Heap(u32 size, u32 operation, u32 permissions) {
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MemoryBlock block;
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block.base_address = HEAP_VADDR;
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block.size = size;
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block.operation = operation;
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block.permissions = permissions;
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if (heap_map.size() > 0) {
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const MemoryBlock last_block = heap_map.rbegin()->second;
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block.address = last_block.address + last_block.size;
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}
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heap_map[block.GetVirtualAddress()] = block;
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return block.GetVirtualAddress();
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}
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u32 MapBlock_HeapLinear(u32 size, u32 operation, u32 permissions) {
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MemoryBlock block;
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block.base_address = LINEAR_HEAP_VADDR;
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block.size = size;
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block.operation = operation;
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block.permissions = permissions;
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if (heap_linear_map.size() > 0) {
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const MemoryBlock last_block = heap_linear_map.rbegin()->second;
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block.address = last_block.address + last_block.size;
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}
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heap_linear_map[block.GetVirtualAddress()] = block;
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return block.GetVirtualAddress();
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}
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void MemBlock_Init() {
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}
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void MemBlock_Shutdown() {
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heap_map.clear();
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heap_linear_map.clear();
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}
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u8 Read8(const VAddr addr) {
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u8 data = 0;
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Read<u8>(data, addr);
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return data;
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}
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u16 Read16(const VAddr addr) {
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u16_le data = 0;
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Read<u16_le>(data, addr);
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return (u16)data;
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}
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u32 Read32(const VAddr addr) {
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u32_le data = 0;
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Read<u32_le>(data, addr);
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return (u32)data;
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}
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u64 Read64(const VAddr addr) {
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u64_le data = 0;
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Read<u64_le>(data, addr);
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return (u64)data;
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}
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u32 Read8_ZX(const VAddr addr) {
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return (u32)Read8(addr);
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}
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u32 Read16_ZX(const VAddr addr) {
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return (u32)Read16(addr);
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}
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void Write8(const VAddr addr, const u8 data) {
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Write<u8>(addr, data);
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}
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void Write16(const VAddr addr, const u16 data) {
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Write<u16_le>(addr, data);
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}
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void Write32(const VAddr addr, const u32 data) {
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Write<u32_le>(addr, data);
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}
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void Write64(const VAddr addr, const u64 data) {
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Write<u64_le>(addr, data);
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}
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void WriteBlock(const VAddr addr, const u8* data, const size_t size) {
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u32 offset = 0;
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while (offset < (size & ~3)) {
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Write32(addr + offset, *(u32*)&data[offset]);
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offset += 4;
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}
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if (size & 2) {
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Write16(addr + offset, *(u16*)&data[offset]);
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offset += 2;
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}
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if (size & 1)
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Write8(addr + offset, data[offset]);
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}
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} // namespace
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@ -0,0 +1,202 @@
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// Copyright 2015 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <array>
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "common/logging/log.h"
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#include "common/swap.h"
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#include "core/hle/config_mem.h"
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#include "core/hle/shared_page.h"
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#include "core/hw/hw.h"
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#include "core/mem_map.h"
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#include "core/memory.h"
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namespace Memory {
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const u32 PAGE_MASK = PAGE_SIZE - 1;
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const int PAGE_BITS = 12;
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enum class PageType {
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/// Page is unmapped and should cause an access error.
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Unmapped,
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/// Page is mapped to regular memory. This is the only type you can get pointers to.
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Memory,
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/// Page is mapped to a I/O region. Writing and reading to this page is handled by functions.
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Special,
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};
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/**
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* A (reasonably) fast way of allowing switchable and remmapable process address spaces. It loosely
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* mimics the way a real CPU page table works, but instead is optimized for minimal decoding and
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* fetching requirements when acessing. In the usual case of an access to regular memory, it only
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* requires an indexed fetch and a check for NULL.
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*/
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struct PageTable {
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static const size_t NUM_ENTRIES = 1 << (32 - PAGE_BITS);
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/**
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* Array of memory pointers backing each page. An entry can only be non-null if the
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* corresponding entry in the `attributes` array is of type `Memory`.
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*/
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std::array<u8*, NUM_ENTRIES> pointers;
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/**
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* Array of fine grained page attributes. If it is set to any value other than `Memory`, then
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* the corresponding entry in `pointer` MUST be set to null.
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*/
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std::array<PageType, NUM_ENTRIES> attributes;
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};
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/// Singular page table used for the singleton process
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static PageTable main_page_table;
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/// Currently active page table
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static PageTable* current_page_table = &main_page_table;
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static void MapPages(u32 base, u32 size, u8* memory, PageType type) {
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LOG_DEBUG(HW_Memory, "Mapping %p onto %08X-%08X", memory, base * PAGE_SIZE, (base + size) * PAGE_SIZE);
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u32 end = base + size;
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while (base != end) {
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ASSERT_MSG(base < PageTable::NUM_ENTRIES, "out of range mapping at %08X", base);
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if (current_page_table->attributes[base] != PageType::Unmapped) {
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LOG_ERROR(HW_Memory, "overlapping memory ranges at %08X", base * PAGE_SIZE);
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}
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current_page_table->attributes[base] = type;
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current_page_table->pointers[base] = memory;
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base += 1;
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memory += PAGE_SIZE;
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}
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}
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void InitMemoryMap() {
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||||||
|
main_page_table.pointers.fill(nullptr);
|
||||||
|
main_page_table.attributes.fill(PageType::Unmapped);
|
||||||
|
}
|
||||||
|
|
||||||
|
void MapMemoryRegion(VAddr base, u32 size, u8* target) {
|
||||||
|
ASSERT_MSG((size & PAGE_MASK) == 0, "non-page aligned size: %08X", size);
|
||||||
|
ASSERT_MSG((base & PAGE_MASK) == 0, "non-page aligned base: %08X", base);
|
||||||
|
MapPages(base / PAGE_SIZE, size / PAGE_SIZE, target, PageType::Memory);
|
||||||
|
}
|
||||||
|
|
||||||
|
void MapIoRegion(VAddr base, u32 size) {
|
||||||
|
ASSERT_MSG((size & PAGE_MASK) == 0, "non-page aligned size: %08X", size);
|
||||||
|
ASSERT_MSG((base & PAGE_MASK) == 0, "non-page aligned base: %08X", base);
|
||||||
|
MapPages(base / PAGE_SIZE, size / PAGE_SIZE, nullptr, PageType::Special);
|
||||||
|
}
|
||||||
|
|
||||||
|
template <typename T>
|
||||||
|
T Read(const VAddr vaddr) {
|
||||||
|
const u8* page_pointer = current_page_table->pointers[vaddr >> PAGE_BITS];
|
||||||
|
if (page_pointer) {
|
||||||
|
return *reinterpret_cast<const T*>(page_pointer + (vaddr & PAGE_MASK));
|
||||||
|
}
|
||||||
|
|
||||||
|
PageType type = current_page_table->attributes[vaddr >> PAGE_BITS];
|
||||||
|
switch (type) {
|
||||||
|
case PageType::Unmapped:
|
||||||
|
LOG_ERROR(HW_Memory, "unmapped Read%lu @ 0x%08X", sizeof(T) * 8, vaddr);
|
||||||
|
return 0;
|
||||||
|
case PageType::Memory:
|
||||||
|
ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr);
|
||||||
|
case PageType::Special:
|
||||||
|
LOG_ERROR(HW_Memory, "I/O reads aren't implemented yet @ %08X", vaddr);
|
||||||
|
return 0;
|
||||||
|
default:
|
||||||
|
UNREACHABLE();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
template <typename T>
|
||||||
|
void Write(const VAddr vaddr, const T data) {
|
||||||
|
u8* page_pointer = current_page_table->pointers[vaddr >> PAGE_BITS];
|
||||||
|
if (page_pointer) {
|
||||||
|
*reinterpret_cast<T*>(page_pointer + (vaddr & PAGE_MASK)) = data;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
PageType type = current_page_table->attributes[vaddr >> PAGE_BITS];
|
||||||
|
switch (type) {
|
||||||
|
case PageType::Unmapped:
|
||||||
|
LOG_ERROR(HW_Memory, "unmapped Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32) data, vaddr);
|
||||||
|
return;
|
||||||
|
case PageType::Memory:
|
||||||
|
ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr);
|
||||||
|
case PageType::Special:
|
||||||
|
LOG_ERROR(HW_Memory, "I/O writes aren't implemented yet @ %08X", vaddr);
|
||||||
|
return;
|
||||||
|
default:
|
||||||
|
UNREACHABLE();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
u8* GetPointer(const VAddr vaddr) {
|
||||||
|
u8* page_pointer = current_page_table->pointers[vaddr >> PAGE_BITS];
|
||||||
|
if (page_pointer) {
|
||||||
|
return page_pointer + (vaddr & PAGE_MASK);
|
||||||
|
}
|
||||||
|
|
||||||
|
LOG_ERROR(HW_Memory, "unknown GetPointer @ 0x%08x", vaddr);
|
||||||
|
return nullptr;
|
||||||
|
}
|
||||||
|
|
||||||
|
u8* GetPhysicalPointer(PAddr address) {
|
||||||
|
return GetPointer(PhysicalToVirtualAddress(address));
|
||||||
|
}
|
||||||
|
|
||||||
|
u8 Read8(const VAddr addr) {
|
||||||
|
return Read<u8>(addr);
|
||||||
|
}
|
||||||
|
|
||||||
|
u16 Read16(const VAddr addr) {
|
||||||
|
return Read<u16_le>(addr);
|
||||||
|
}
|
||||||
|
|
||||||
|
u32 Read32(const VAddr addr) {
|
||||||
|
return Read<u32_le>(addr);
|
||||||
|
}
|
||||||
|
|
||||||
|
u64 Read64(const VAddr addr) {
|
||||||
|
return Read<u64_le>(addr);
|
||||||
|
}
|
||||||
|
|
||||||
|
void Write8(const VAddr addr, const u8 data) {
|
||||||
|
Write<u8>(addr, data);
|
||||||
|
}
|
||||||
|
|
||||||
|
void Write16(const VAddr addr, const u16 data) {
|
||||||
|
Write<u16_le>(addr, data);
|
||||||
|
}
|
||||||
|
|
||||||
|
void Write32(const VAddr addr, const u32 data) {
|
||||||
|
Write<u32_le>(addr, data);
|
||||||
|
}
|
||||||
|
|
||||||
|
void Write64(const VAddr addr, const u64 data) {
|
||||||
|
Write<u64_le>(addr, data);
|
||||||
|
}
|
||||||
|
|
||||||
|
void WriteBlock(const VAddr addr, const u8* data, const size_t size) {
|
||||||
|
u32 offset = 0;
|
||||||
|
while (offset < (size & ~3)) {
|
||||||
|
Write32(addr + offset, *(u32*)&data[offset]);
|
||||||
|
offset += 4;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (size & 2) {
|
||||||
|
Write16(addr + offset, *(u16*)&data[offset]);
|
||||||
|
offset += 2;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (size & 1)
|
||||||
|
Write8(addr + offset, data[offset]);
|
||||||
|
}
|
||||||
|
|
||||||
|
} // namespace
|
||||||
@ -0,0 +1,129 @@
|
|||||||
|
// Copyright 2014 Citra Emulator Project
|
||||||
|
// Licensed under GPLv2 or any later version
|
||||||
|
// Refer to the license.txt file included.
|
||||||
|
|
||||||
|
#pragma once
|
||||||
|
|
||||||
|
#include "common/common_types.h"
|
||||||
|
|
||||||
|
namespace Memory {
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Page size used by the ARM architecture. This is the smallest granularity with which memory can
|
||||||
|
* be mapped.
|
||||||
|
*/
|
||||||
|
const u32 PAGE_SIZE = 0x1000;
|
||||||
|
|
||||||
|
/// Physical memory regions as seen from the ARM11
|
||||||
|
enum : PAddr {
|
||||||
|
/// IO register area
|
||||||
|
IO_AREA_PADDR = 0x10100000,
|
||||||
|
IO_AREA_SIZE = 0x01000000, ///< IO area size (16MB)
|
||||||
|
IO_AREA_PADDR_END = IO_AREA_PADDR + IO_AREA_SIZE,
|
||||||
|
|
||||||
|
/// MPCore internal memory region
|
||||||
|
MPCORE_RAM_PADDR = 0x17E00000,
|
||||||
|
MPCORE_RAM_SIZE = 0x00002000, ///< MPCore internal memory size (8KB)
|
||||||
|
MPCORE_RAM_PADDR_END = MPCORE_RAM_PADDR + MPCORE_RAM_SIZE,
|
||||||
|
|
||||||
|
/// Video memory
|
||||||
|
VRAM_PADDR = 0x18000000,
|
||||||
|
VRAM_SIZE = 0x00600000, ///< VRAM size (6MB)
|
||||||
|
VRAM_PADDR_END = VRAM_PADDR + VRAM_SIZE,
|
||||||
|
|
||||||
|
/// DSP memory
|
||||||
|
DSP_RAM_PADDR = 0x1FF00000,
|
||||||
|
DSP_RAM_SIZE = 0x00080000, ///< DSP memory size (512KB)
|
||||||
|
DSP_RAM_PADDR_END = DSP_RAM_PADDR + DSP_RAM_SIZE,
|
||||||
|
|
||||||
|
/// AXI WRAM
|
||||||
|
AXI_WRAM_PADDR = 0x1FF80000,
|
||||||
|
AXI_WRAM_SIZE = 0x00080000, ///< AXI WRAM size (512KB)
|
||||||
|
AXI_WRAM_PADDR_END = AXI_WRAM_PADDR + AXI_WRAM_SIZE,
|
||||||
|
|
||||||
|
/// Main FCRAM
|
||||||
|
FCRAM_PADDR = 0x20000000,
|
||||||
|
FCRAM_SIZE = 0x08000000, ///< FCRAM size (128MB)
|
||||||
|
FCRAM_PADDR_END = FCRAM_PADDR + FCRAM_SIZE,
|
||||||
|
};
|
||||||
|
|
||||||
|
/// Virtual user-space memory regions
|
||||||
|
enum : VAddr {
|
||||||
|
/// Where the application text, data and bss reside.
|
||||||
|
PROCESS_IMAGE_VADDR = 0x00100000,
|
||||||
|
PROCESS_IMAGE_MAX_SIZE = 0x03F00000,
|
||||||
|
PROCESS_IMAGE_VADDR_END = PROCESS_IMAGE_VADDR + PROCESS_IMAGE_MAX_SIZE,
|
||||||
|
|
||||||
|
/// Area where IPC buffers are mapped onto.
|
||||||
|
IPC_MAPPING_VADDR = 0x04000000,
|
||||||
|
IPC_MAPPING_SIZE = 0x04000000,
|
||||||
|
IPC_MAPPING_VADDR_END = IPC_MAPPING_VADDR + IPC_MAPPING_SIZE,
|
||||||
|
|
||||||
|
/// Application heap (includes stack).
|
||||||
|
HEAP_VADDR = 0x08000000,
|
||||||
|
HEAP_SIZE = 0x08000000,
|
||||||
|
HEAP_VADDR_END = HEAP_VADDR + HEAP_SIZE,
|
||||||
|
|
||||||
|
/// Area where shared memory buffers are mapped onto.
|
||||||
|
SHARED_MEMORY_VADDR = 0x10000000,
|
||||||
|
SHARED_MEMORY_SIZE = 0x04000000,
|
||||||
|
SHARED_MEMORY_VADDR_END = SHARED_MEMORY_VADDR + SHARED_MEMORY_SIZE,
|
||||||
|
|
||||||
|
/// Maps 1:1 to an offset in FCRAM. Used for HW allocations that need to be linear in physical memory.
|
||||||
|
LINEAR_HEAP_VADDR = 0x14000000,
|
||||||
|
LINEAR_HEAP_SIZE = 0x08000000,
|
||||||
|
LINEAR_HEAP_VADDR_END = LINEAR_HEAP_VADDR + LINEAR_HEAP_SIZE,
|
||||||
|
|
||||||
|
/// Maps 1:1 to the IO register area.
|
||||||
|
IO_AREA_VADDR = 0x1EC00000,
|
||||||
|
IO_AREA_VADDR_END = IO_AREA_VADDR + IO_AREA_SIZE,
|
||||||
|
|
||||||
|
/// Maps 1:1 to VRAM.
|
||||||
|
VRAM_VADDR = 0x1F000000,
|
||||||
|
VRAM_VADDR_END = VRAM_VADDR + VRAM_SIZE,
|
||||||
|
|
||||||
|
/// Maps 1:1 to DSP memory.
|
||||||
|
DSP_RAM_VADDR = 0x1FF00000,
|
||||||
|
DSP_RAM_VADDR_END = DSP_RAM_VADDR + DSP_RAM_SIZE,
|
||||||
|
|
||||||
|
/// Read-only page containing kernel and system configuration values.
|
||||||
|
CONFIG_MEMORY_VADDR = 0x1FF80000,
|
||||||
|
CONFIG_MEMORY_SIZE = 0x00001000,
|
||||||
|
CONFIG_MEMORY_VADDR_END = CONFIG_MEMORY_VADDR + CONFIG_MEMORY_SIZE,
|
||||||
|
|
||||||
|
/// Usually read-only page containing mostly values read from hardware.
|
||||||
|
SHARED_PAGE_VADDR = 0x1FF81000,
|
||||||
|
SHARED_PAGE_SIZE = 0x00001000,
|
||||||
|
SHARED_PAGE_VADDR_END = SHARED_PAGE_VADDR + SHARED_PAGE_SIZE,
|
||||||
|
|
||||||
|
// TODO(yuriks): The size of this area is dynamic, the kernel grows
|
||||||
|
// it as more and more threads are created. For now we'll just use a
|
||||||
|
// hardcoded value.
|
||||||
|
/// Area where TLS (Thread-Local Storage) buffers are allocated.
|
||||||
|
TLS_AREA_VADDR = 0x1FF82000,
|
||||||
|
TLS_AREA_SIZE = 0x00030000, // Each TLS buffer is 0x200 bytes, allows for 300 threads
|
||||||
|
TLS_AREA_VADDR_END = TLS_AREA_VADDR + TLS_AREA_SIZE,
|
||||||
|
};
|
||||||
|
|
||||||
|
u8 Read8(VAddr addr);
|
||||||
|
u16 Read16(VAddr addr);
|
||||||
|
u32 Read32(VAddr addr);
|
||||||
|
u64 Read64(VAddr addr);
|
||||||
|
|
||||||
|
void Write8(VAddr addr, u8 data);
|
||||||
|
void Write16(VAddr addr, u16 data);
|
||||||
|
void Write32(VAddr addr, u32 data);
|
||||||
|
void Write64(VAddr addr, u64 data);
|
||||||
|
|
||||||
|
void WriteBlock(VAddr addr, const u8* data, size_t size);
|
||||||
|
|
||||||
|
u8* GetPointer(VAddr virtual_address);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Gets a pointer to the memory region beginning at the specified physical address.
|
||||||
|
*
|
||||||
|
* @note This is currently implemented using PhysicalToVirtualAddress().
|
||||||
|
*/
|
||||||
|
u8* GetPhysicalPointer(PAddr address);
|
||||||
|
|
||||||
|
}
|
||||||
@ -0,0 +1,29 @@
|
|||||||
|
// Copyright 2015 Citra Emulator Project
|
||||||
|
// Licensed under GPLv2 or any later version
|
||||||
|
// Refer to the license.txt file included.
|
||||||
|
|
||||||
|
#pragma once
|
||||||
|
|
||||||
|
#include "common/common_types.h"
|
||||||
|
|
||||||
|
namespace Memory {
|
||||||
|
|
||||||
|
void InitMemoryMap();
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Maps an allocated buffer onto a region of the emulated process address space.
|
||||||
|
*
|
||||||
|
* @param base The address to start mapping at. Must be page-aligned.
|
||||||
|
* @param size The amount of bytes to map. Must be page-aligned.
|
||||||
|
* @param target Buffer with the memory backing the mapping. Must be of length at least `size`.
|
||||||
|
*/
|
||||||
|
void MapMemoryRegion(VAddr base, u32 size, u8* target);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Maps a region of the emulated process address space as a IO region.
|
||||||
|
* @note Currently this can only be used to mark a region as being IO, since actual memory-mapped
|
||||||
|
* IO isn't yet supported.
|
||||||
|
*/
|
||||||
|
void MapIoRegion(VAddr base, u32 size);
|
||||||
|
|
||||||
|
}
|
||||||
Loading…
Reference in New Issue