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@ -1800,8 +1800,8 @@ private:
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Tegra::Shader::IpaMode input_mode{Tegra::Shader::IpaInterpMode::Perspective,
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Tegra::Shader::IpaSampleMode::Default};
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u32 next_element = instr.attribute.fmt20.element;
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u32 next_index = static_cast<u32>(instr.attribute.fmt20.index.Value());
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u64 next_element = instr.attribute.fmt20.element;
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u64 next_index = static_cast<u64>(instr.attribute.fmt20.index.Value());
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const auto LoadNextElement = [&](u32 reg_offset) {
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regs.SetRegisterToInputAttibute(instr.gpr0.Value() + reg_offset, next_element,
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@ -1865,8 +1865,8 @@ private:
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ASSERT_MSG((instr.attribute.fmt20.immediate.Value() % sizeof(u32)) == 0,
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"Unaligned attribute loads are not supported");
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u32 next_element = instr.attribute.fmt20.element;
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u32 next_index = static_cast<u32>(instr.attribute.fmt20.index.Value());
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u64 next_element = instr.attribute.fmt20.element;
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u64 next_index = static_cast<u64>(instr.attribute.fmt20.index.Value());
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const auto StoreNextElement = [&](u32 reg_offset) {
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regs.SetOutputAttributeToRegister(static_cast<Attribute::Index>(next_index),
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