Yuri Kunde Schlesner
GitHub
commit
bf14f4be22
@ -1,888 +1,48 @@
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// Copyright 2015 Citra Emulator Project
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// Copyright 2016 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <algorithm>
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#include <cmath>
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#include <cstdint>
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#include <nihstro/shader_bytecode.h>
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#include <smmintrin.h>
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#include <xmmintrin.h>
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#include "common/assert.h"
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#include "common/logging/log.h"
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#include "common/vector_math.h"
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#include "common/x64/cpu_detect.h"
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#include "common/x64/xbyak_abi.h"
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#include "common/x64/xbyak_util.h"
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#include "video_core/pica_state.h"
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#include "video_core/pica_types.h"
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#include "common/hash.h"
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#include "common/microprofile.h"
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#include "video_core/shader/shader.h"
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#include "video_core/shader/shader_jit_x64.h"
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using namespace Common::X64;
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using namespace Xbyak::util;
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using Xbyak::Label;
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using Xbyak::Reg32;
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using Xbyak::Reg64;
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using Xbyak::Xmm;
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#include "video_core/shader/shader_jit_x64_compiler.h"
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namespace Pica {
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namespace Shader {
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typedef void (JitShader::*JitFunction)(Instruction instr);
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JitX64Engine::JitX64Engine() = default;
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JitX64Engine::~JitX64Engine() = default;
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const JitFunction instr_table[64] = {
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&JitShader::Compile_ADD, // add
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&JitShader::Compile_DP3, // dp3
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&JitShader::Compile_DP4, // dp4
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&JitShader::Compile_DPH, // dph
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nullptr, // unknown
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&JitShader::Compile_EX2, // ex2
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&JitShader::Compile_LG2, // lg2
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nullptr, // unknown
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&JitShader::Compile_MUL, // mul
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&JitShader::Compile_SGE, // sge
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&JitShader::Compile_SLT, // slt
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&JitShader::Compile_FLR, // flr
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&JitShader::Compile_MAX, // max
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&JitShader::Compile_MIN, // min
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&JitShader::Compile_RCP, // rcp
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&JitShader::Compile_RSQ, // rsq
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nullptr, // unknown
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nullptr, // unknown
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&JitShader::Compile_MOVA, // mova
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&JitShader::Compile_MOV, // mov
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nullptr, // unknown
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nullptr, // unknown
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nullptr, // unknown
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nullptr, // unknown
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&JitShader::Compile_DPH, // dphi
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nullptr, // unknown
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&JitShader::Compile_SGE, // sgei
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&JitShader::Compile_SLT, // slti
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nullptr, // unknown
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nullptr, // unknown
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nullptr, // unknown
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nullptr, // unknown
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nullptr, // unknown
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&JitShader::Compile_NOP, // nop
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&JitShader::Compile_END, // end
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nullptr, // break
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&JitShader::Compile_CALL, // call
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&JitShader::Compile_CALLC, // callc
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&JitShader::Compile_CALLU, // callu
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&JitShader::Compile_IF, // ifu
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&JitShader::Compile_IF, // ifc
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&JitShader::Compile_LOOP, // loop
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nullptr, // emit
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nullptr, // sete
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&JitShader::Compile_JMP, // jmpc
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&JitShader::Compile_JMP, // jmpu
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&JitShader::Compile_CMP, // cmp
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&JitShader::Compile_CMP, // cmp
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&JitShader::Compile_MAD, // madi
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&JitShader::Compile_MAD, // madi
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&JitShader::Compile_MAD, // madi
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&JitShader::Compile_MAD, // madi
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&JitShader::Compile_MAD, // madi
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&JitShader::Compile_MAD, // madi
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&JitShader::Compile_MAD, // madi
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&JitShader::Compile_MAD, // madi
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&JitShader::Compile_MAD, // mad
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&JitShader::Compile_MAD, // mad
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&JitShader::Compile_MAD, // mad
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&JitShader::Compile_MAD, // mad
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&JitShader::Compile_MAD, // mad
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&JitShader::Compile_MAD, // mad
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&JitShader::Compile_MAD, // mad
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&JitShader::Compile_MAD, // mad
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};
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void JitX64Engine::SetupBatch(ShaderSetup& setup, unsigned int entry_point) {
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ASSERT(entry_point < 1024);
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setup.engine_data.entry_point = entry_point;
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// The following is used to alias some commonly used registers. Generally, RAX-RDX and XMM0-XMM3 can
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// be used as scratch registers within a compiler function. The other registers have designated
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// purposes, as documented below:
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u64 code_hash = Common::ComputeHash64(&setup.program_code, sizeof(setup.program_code));
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u64 swizzle_hash = Common::ComputeHash64(&setup.swizzle_data, sizeof(setup.swizzle_data));
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/// Pointer to the uniform memory
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static const Reg64 SETUP = r9;
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/// The two 32-bit VS address offset registers set by the MOVA instruction
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static const Reg64 ADDROFFS_REG_0 = r10;
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static const Reg64 ADDROFFS_REG_1 = r11;
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/// VS loop count register (Multiplied by 16)
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static const Reg32 LOOPCOUNT_REG = r12d;
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/// Current VS loop iteration number (we could probably use LOOPCOUNT_REG, but this quicker)
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static const Reg32 LOOPCOUNT = esi;
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/// Number to increment LOOPCOUNT_REG by on each loop iteration (Multiplied by 16)
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static const Reg32 LOOPINC = edi;
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/// Result of the previous CMP instruction for the X-component comparison
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static const Reg64 COND0 = r13;
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/// Result of the previous CMP instruction for the Y-component comparison
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static const Reg64 COND1 = r14;
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/// Pointer to the UnitState instance for the current VS unit
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static const Reg64 STATE = r15;
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/// SIMD scratch register
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static const Xmm SCRATCH = xmm0;
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/// Loaded with the first swizzled source register, otherwise can be used as a scratch register
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static const Xmm SRC1 = xmm1;
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/// Loaded with the second swizzled source register, otherwise can be used as a scratch register
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static const Xmm SRC2 = xmm2;
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/// Loaded with the third swizzled source register, otherwise can be used as a scratch register
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static const Xmm SRC3 = xmm3;
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/// Additional scratch register
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static const Xmm SCRATCH2 = xmm4;
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/// Constant vector of [1.0f, 1.0f, 1.0f, 1.0f], used to efficiently set a vector to one
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static const Xmm ONE = xmm14;
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/// Constant vector of [-0.f, -0.f, -0.f, -0.f], used to efficiently negate a vector with XOR
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static const Xmm NEGBIT = xmm15;
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// State registers that must not be modified by external functions calls
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// Scratch registers, e.g., SRC1 and SCRATCH, have to be saved on the side if needed
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static const BitSet32 persistent_regs = BuildRegSet({
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// Pointers to register blocks
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SETUP, STATE,
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// Cached registers
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ADDROFFS_REG_0, ADDROFFS_REG_1, LOOPCOUNT_REG, COND0, COND1,
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// Constants
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ONE, NEGBIT,
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});
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/// Raw constant for the source register selector that indicates no swizzling is performed
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static const u8 NO_SRC_REG_SWIZZLE = 0x1b;
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/// Raw constant for the destination register enable mask that indicates all components are enabled
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static const u8 NO_DEST_REG_MASK = 0xf;
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/**
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* Get the vertex shader instruction for a given offset in the current shader program
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* @param offset Offset in the current shader program of the instruction
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* @return Instruction at the specified offset
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*/
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static Instruction GetVertexShaderInstruction(size_t offset) {
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return {g_state.vs.program_code[offset]};
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}
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static void LogCritical(const char* msg) {
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LOG_CRITICAL(HW_GPU, "%s", msg);
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}
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void JitShader::Compile_Assert(bool condition, const char* msg) {
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if (!condition) {
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mov(ABI_PARAM1, reinterpret_cast<size_t>(msg));
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CallFarFunction(*this, LogCritical);
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}
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}
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/**
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* Loads and swizzles a source register into the specified XMM register.
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* @param instr VS instruction, used for determining how to load the source register
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* @param src_num Number indicating which source register to load (1 = src1, 2 = src2, 3 = src3)
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* @param src_reg SourceRegister object corresponding to the source register to load
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* @param dest Destination XMM register to store the loaded, swizzled source register
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*/
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void JitShader::Compile_SwizzleSrc(Instruction instr, unsigned src_num, SourceRegister src_reg,
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Xmm dest) {
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Reg64 src_ptr;
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size_t src_offset;
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if (src_reg.GetRegisterType() == RegisterType::FloatUniform) {
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src_ptr = SETUP;
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src_offset = ShaderSetup::GetFloatUniformOffset(src_reg.GetIndex());
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u64 cache_key = code_hash ^ swizzle_hash;
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auto iter = cache.find(cache_key);
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if (iter != cache.end()) {
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setup.engine_data.cached_shader = iter->second.get();
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} else {
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src_ptr = STATE;
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src_offset = UnitState::InputOffset(src_reg);
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}
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int src_offset_disp = (int)src_offset;
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ASSERT_MSG(src_offset == src_offset_disp, "Source register offset too large for int type");
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unsigned operand_desc_id;
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const bool is_inverted =
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(0 != (instr.opcode.Value().GetInfo().subtype & OpCode::Info::SrcInversed));
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unsigned address_register_index;
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unsigned offset_src;
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if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MAD ||
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instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI) {
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operand_desc_id = instr.mad.operand_desc_id;
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offset_src = is_inverted ? 3 : 2;
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address_register_index = instr.mad.address_register_index;
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} else {
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operand_desc_id = instr.common.operand_desc_id;
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offset_src = is_inverted ? 2 : 1;
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address_register_index = instr.common.address_register_index;
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}
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if (src_num == offset_src && address_register_index != 0) {
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switch (address_register_index) {
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case 1: // address offset 1
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movaps(dest, xword[src_ptr + ADDROFFS_REG_0 + src_offset_disp]);
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break;
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case 2: // address offset 2
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movaps(dest, xword[src_ptr + ADDROFFS_REG_1 + src_offset_disp]);
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break;
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case 3: // address offset 3
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movaps(dest, xword[src_ptr + LOOPCOUNT_REG.cvt64() + src_offset_disp]);
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break;
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default:
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UNREACHABLE();
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break;
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}
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} else {
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// Load the source
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movaps(dest, xword[src_ptr + src_offset_disp]);
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}
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SwizzlePattern swiz = {g_state.vs.swizzle_data[operand_desc_id]};
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// Generate instructions for source register swizzling as needed
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u8 sel = swiz.GetRawSelector(src_num);
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if (sel != NO_SRC_REG_SWIZZLE) {
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// Selector component order needs to be reversed for the SHUFPS instruction
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sel = ((sel & 0xc0) >> 6) | ((sel & 3) << 6) | ((sel & 0xc) << 2) | ((sel & 0x30) >> 2);
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// Shuffle inputs for swizzle
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shufps(dest, dest, sel);
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}
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// If the source register should be negated, flip the negative bit using XOR
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const bool negate[] = {swiz.negate_src1, swiz.negate_src2, swiz.negate_src3};
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if (negate[src_num - 1]) {
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xorps(dest, NEGBIT);
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auto shader = std::make_unique<JitShader>();
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shader->Compile(&setup.program_code, &setup.swizzle_data);
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setup.engine_data.cached_shader = shader.get();
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cache.emplace_hint(iter, cache_key, std::move(shader));
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}
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}
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void JitShader::Compile_DestEnable(Instruction instr, Xmm src) {
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DestRegister dest;
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unsigned operand_desc_id;
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if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MAD ||
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instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI) {
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operand_desc_id = instr.mad.operand_desc_id;
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dest = instr.mad.dest.Value();
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} else {
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operand_desc_id = instr.common.operand_desc_id;
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dest = instr.common.dest.Value();
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}
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MICROPROFILE_DECLARE(GPU_Shader);
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SwizzlePattern swiz = {g_state.vs.swizzle_data[operand_desc_id]};
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void JitX64Engine::Run(const ShaderSetup& setup, UnitState& state) const {
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ASSERT(setup.engine_data.cached_shader != nullptr);
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size_t dest_offset_disp = UnitState::OutputOffset(dest);
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MICROPROFILE_SCOPE(GPU_Shader);
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// If all components are enabled, write the result to the destination register
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if (swiz.dest_mask == NO_DEST_REG_MASK) {
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// Store dest back to memory
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movaps(xword[STATE + dest_offset_disp], src);
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} else {
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// Not all components are enabled, so mask the result when storing to the destination
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// register...
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movaps(SCRATCH, xword[STATE + dest_offset_disp]);
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if (Common::GetCPUCaps().sse4_1) {
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u8 mask = ((swiz.dest_mask & 1) << 3) | ((swiz.dest_mask & 8) >> 3) |
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((swiz.dest_mask & 2) << 1) | ((swiz.dest_mask & 4) >> 1);
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blendps(SCRATCH, src, mask);
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} else {
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movaps(SCRATCH2, src);
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unpckhps(SCRATCH2, SCRATCH); // Unpack X/Y components of source and destination
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unpcklps(SCRATCH, src); // Unpack Z/W components of source and destination
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// Compute selector to selectively copy source components to destination for SHUFPS
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// instruction
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u8 sel = ((swiz.DestComponentEnabled(0) ? 1 : 0) << 0) |
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((swiz.DestComponentEnabled(1) ? 3 : 2) << 2) |
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((swiz.DestComponentEnabled(2) ? 0 : 1) << 4) |
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((swiz.DestComponentEnabled(3) ? 2 : 3) << 6);
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shufps(SCRATCH, SCRATCH2, sel);
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}
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// Store dest back to memory
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movaps(xword[STATE + dest_offset_disp], SCRATCH);
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}
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const JitShader* shader = static_cast<const JitShader*>(setup.engine_data.cached_shader);
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shader->Run(setup, state, setup.engine_data.entry_point);
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}
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void JitShader::Compile_SanitizedMul(Xmm src1, Xmm src2, Xmm scratch) {
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movaps(scratch, src1);
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cmpordps(scratch, src2);
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mulps(src1, src2);
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movaps(src2, src1);
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cmpunordps(src2, src2);
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xorps(scratch, src2);
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andps(src1, scratch);
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}
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void JitShader::Compile_EvaluateCondition(Instruction instr) {
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// Note: NXOR is used below to check for equality
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switch (instr.flow_control.op) {
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case Instruction::FlowControlType::Or:
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mov(eax, COND0);
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mov(ebx, COND1);
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xor(eax, (instr.flow_control.refx.Value() ^ 1));
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xor(ebx, (instr.flow_control.refy.Value() ^ 1));
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or (eax, ebx);
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break;
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case Instruction::FlowControlType::And:
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mov(eax, COND0);
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mov(ebx, COND1);
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xor(eax, (instr.flow_control.refx.Value() ^ 1));
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xor(ebx, (instr.flow_control.refy.Value() ^ 1));
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and(eax, ebx);
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break;
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case Instruction::FlowControlType::JustX:
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mov(eax, COND0);
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xor(eax, (instr.flow_control.refx.Value() ^ 1));
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break;
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case Instruction::FlowControlType::JustY:
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mov(eax, COND1);
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xor(eax, (instr.flow_control.refy.Value() ^ 1));
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break;
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}
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}
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void JitShader::Compile_UniformCondition(Instruction instr) {
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size_t offset = ShaderSetup::GetBoolUniformOffset(instr.flow_control.bool_uniform_id);
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cmp(byte[SETUP + offset], 0);
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}
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BitSet32 JitShader::PersistentCallerSavedRegs() {
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return persistent_regs & ABI_ALL_CALLER_SAVED;
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}
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void JitShader::Compile_ADD(Instruction instr) {
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Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
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Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
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addps(SRC1, SRC2);
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Compile_DestEnable(instr, SRC1);
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}
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void JitShader::Compile_DP3(Instruction instr) {
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Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
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Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
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Compile_SanitizedMul(SRC1, SRC2, SCRATCH);
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movaps(SRC2, SRC1);
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shufps(SRC2, SRC2, _MM_SHUFFLE(1, 1, 1, 1));
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movaps(SRC3, SRC1);
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shufps(SRC3, SRC3, _MM_SHUFFLE(2, 2, 2, 2));
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shufps(SRC1, SRC1, _MM_SHUFFLE(0, 0, 0, 0));
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addps(SRC1, SRC2);
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addps(SRC1, SRC3);
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Compile_DestEnable(instr, SRC1);
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}
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void JitShader::Compile_DP4(Instruction instr) {
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Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
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Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
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Compile_SanitizedMul(SRC1, SRC2, SCRATCH);
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movaps(SRC2, SRC1);
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shufps(SRC1, SRC1, _MM_SHUFFLE(2, 3, 0, 1)); // XYZW -> ZWXY
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addps(SRC1, SRC2);
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|
||||
movaps(SRC2, SRC1);
|
||||
shufps(SRC1, SRC1, _MM_SHUFFLE(0, 1, 2, 3)); // XYZW -> WZYX
|
||||
addps(SRC1, SRC2);
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_DPH(Instruction instr) {
|
||||
if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::DPHI) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1i, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2i, SRC2);
|
||||
} else {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
}
|
||||
|
||||
if (Common::GetCPUCaps().sse4_1) {
|
||||
// Set 4th component to 1.0
|
||||
blendps(SRC1, ONE, 0b1000);
|
||||
} else {
|
||||
// Set 4th component to 1.0
|
||||
movaps(SCRATCH, SRC1);
|
||||
unpckhps(SCRATCH, ONE); // XYZW, 1111 -> Z1__
|
||||
unpcklpd(SRC1, SCRATCH); // XYZW, Z1__ -> XYZ1
|
||||
}
|
||||
|
||||
Compile_SanitizedMul(SRC1, SRC2, SCRATCH);
|
||||
|
||||
movaps(SRC2, SRC1);
|
||||
shufps(SRC1, SRC1, _MM_SHUFFLE(2, 3, 0, 1)); // XYZW -> ZWXY
|
||||
addps(SRC1, SRC2);
|
||||
|
||||
movaps(SRC2, SRC1);
|
||||
shufps(SRC1, SRC1, _MM_SHUFFLE(0, 1, 2, 3)); // XYZW -> WZYX
|
||||
addps(SRC1, SRC2);
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_EX2(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
movss(xmm0, SRC1); // ABI_PARAM1
|
||||
|
||||
ABI_PushRegistersAndAdjustStack(*this, PersistentCallerSavedRegs(), 0);
|
||||
CallFarFunction(*this, exp2f);
|
||||
ABI_PopRegistersAndAdjustStack(*this, PersistentCallerSavedRegs(), 0);
|
||||
|
||||
shufps(xmm0, xmm0, _MM_SHUFFLE(0, 0, 0, 0)); // ABI_RETURN
|
||||
movaps(SRC1, xmm0);
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_LG2(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
movss(xmm0, SRC1); // ABI_PARAM1
|
||||
|
||||
ABI_PushRegistersAndAdjustStack(*this, PersistentCallerSavedRegs(), 0);
|
||||
CallFarFunction(*this, log2f);
|
||||
ABI_PopRegistersAndAdjustStack(*this, PersistentCallerSavedRegs(), 0);
|
||||
|
||||
shufps(xmm0, xmm0, _MM_SHUFFLE(0, 0, 0, 0)); // ABI_RETURN
|
||||
movaps(SRC1, xmm0);
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_MUL(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
Compile_SanitizedMul(SRC1, SRC2, SCRATCH);
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_SGE(Instruction instr) {
|
||||
if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::SGEI) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1i, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2i, SRC2);
|
||||
} else {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
}
|
||||
|
||||
cmpleps(SRC2, SRC1);
|
||||
andps(SRC2, ONE);
|
||||
|
||||
Compile_DestEnable(instr, SRC2);
|
||||
}
|
||||
|
||||
void JitShader::Compile_SLT(Instruction instr) {
|
||||
if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::SLTI) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1i, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2i, SRC2);
|
||||
} else {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
}
|
||||
|
||||
cmpltps(SRC1, SRC2);
|
||||
andps(SRC1, ONE);
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_FLR(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
|
||||
if (Common::GetCPUCaps().sse4_1) {
|
||||
roundps(SRC1, SRC1, _MM_FROUND_FLOOR);
|
||||
} else {
|
||||
cvttps2dq(SRC1, SRC1);
|
||||
cvtdq2ps(SRC1, SRC1);
|
||||
}
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_MAX(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
// SSE semantics match PICA200 ones: In case of NaN, SRC2 is returned.
|
||||
maxps(SRC1, SRC2);
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_MIN(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
// SSE semantics match PICA200 ones: In case of NaN, SRC2 is returned.
|
||||
minps(SRC1, SRC2);
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_MOVA(Instruction instr) {
|
||||
SwizzlePattern swiz = {g_state.vs.swizzle_data[instr.common.operand_desc_id]};
|
||||
|
||||
if (!swiz.DestComponentEnabled(0) && !swiz.DestComponentEnabled(1)) {
|
||||
return; // NoOp
|
||||
}
|
||||
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
|
||||
// Convert floats to integers using truncation (only care about X and Y components)
|
||||
cvttps2dq(SRC1, SRC1);
|
||||
|
||||
// Get result
|
||||
movq(rax, SRC1);
|
||||
|
||||
// Handle destination enable
|
||||
if (swiz.DestComponentEnabled(0) && swiz.DestComponentEnabled(1)) {
|
||||
// Move and sign-extend low 32 bits
|
||||
movsxd(ADDROFFS_REG_0, eax);
|
||||
|
||||
// Move and sign-extend high 32 bits
|
||||
shr(rax, 32);
|
||||
movsxd(ADDROFFS_REG_1, eax);
|
||||
|
||||
// Multiply by 16 to be used as an offset later
|
||||
shl(ADDROFFS_REG_0, 4);
|
||||
shl(ADDROFFS_REG_1, 4);
|
||||
} else {
|
||||
if (swiz.DestComponentEnabled(0)) {
|
||||
// Move and sign-extend low 32 bits
|
||||
movsxd(ADDROFFS_REG_0, eax);
|
||||
|
||||
// Multiply by 16 to be used as an offset later
|
||||
shl(ADDROFFS_REG_0, 4);
|
||||
} else if (swiz.DestComponentEnabled(1)) {
|
||||
// Move and sign-extend high 32 bits
|
||||
shr(rax, 32);
|
||||
movsxd(ADDROFFS_REG_1, eax);
|
||||
|
||||
// Multiply by 16 to be used as an offset later
|
||||
shl(ADDROFFS_REG_1, 4);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void JitShader::Compile_MOV(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_RCP(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
|
||||
// TODO(bunnei): RCPSS is a pretty rough approximation, this might cause problems if Pica
|
||||
// performs this operation more accurately. This should be checked on hardware.
|
||||
rcpss(SRC1, SRC1);
|
||||
shufps(SRC1, SRC1, _MM_SHUFFLE(0, 0, 0, 0)); // XYWZ -> XXXX
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_RSQ(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
|
||||
// TODO(bunnei): RSQRTSS is a pretty rough approximation, this might cause problems if Pica
|
||||
// performs this operation more accurately. This should be checked on hardware.
|
||||
rsqrtss(SRC1, SRC1);
|
||||
shufps(SRC1, SRC1, _MM_SHUFFLE(0, 0, 0, 0)); // XYWZ -> XXXX
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_NOP(Instruction instr) {}
|
||||
|
||||
void JitShader::Compile_END(Instruction instr) {
|
||||
ABI_PopRegistersAndAdjustStack(*this, ABI_ALL_CALLEE_SAVED, 8);
|
||||
ret();
|
||||
}
|
||||
|
||||
void JitShader::Compile_CALL(Instruction instr) {
|
||||
// Push offset of the return
|
||||
push(qword, (instr.flow_control.dest_offset + instr.flow_control.num_instructions));
|
||||
|
||||
// Call the subroutine
|
||||
call(instruction_labels[instr.flow_control.dest_offset]);
|
||||
|
||||
// Skip over the return offset that's on the stack
|
||||
add(rsp, 8);
|
||||
}
|
||||
|
||||
void JitShader::Compile_CALLC(Instruction instr) {
|
||||
Compile_EvaluateCondition(instr);
|
||||
Label b;
|
||||
jz(b);
|
||||
Compile_CALL(instr);
|
||||
L(b);
|
||||
}
|
||||
|
||||
void JitShader::Compile_CALLU(Instruction instr) {
|
||||
Compile_UniformCondition(instr);
|
||||
Label b;
|
||||
jz(b);
|
||||
Compile_CALL(instr);
|
||||
L(b);
|
||||
}
|
||||
|
||||
void JitShader::Compile_CMP(Instruction instr) {
|
||||
using Op = Instruction::Common::CompareOpType::Op;
|
||||
Op op_x = instr.common.compare_op.x;
|
||||
Op op_y = instr.common.compare_op.y;
|
||||
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
|
||||
// SSE doesn't have greater-than (GT) or greater-equal (GE) comparison operators. You need to
|
||||
// emulate them by swapping the lhs and rhs and using LT and LE. NLT and NLE can't be used here
|
||||
// because they don't match when used with NaNs.
|
||||
static const u8 cmp[] = {CMP_EQ, CMP_NEQ, CMP_LT, CMP_LE, CMP_LT, CMP_LE};
|
||||
|
||||
bool invert_op_x = (op_x == Op::GreaterThan || op_x == Op::GreaterEqual);
|
||||
Xmm lhs_x = invert_op_x ? SRC2 : SRC1;
|
||||
Xmm rhs_x = invert_op_x ? SRC1 : SRC2;
|
||||
|
||||
if (op_x == op_y) {
|
||||
// Compare X-component and Y-component together
|
||||
cmpps(lhs_x, rhs_x, cmp[op_x]);
|
||||
movq(COND0, lhs_x);
|
||||
|
||||
mov(COND1, COND0);
|
||||
} else {
|
||||
bool invert_op_y = (op_y == Op::GreaterThan || op_y == Op::GreaterEqual);
|
||||
Xmm lhs_y = invert_op_y ? SRC2 : SRC1;
|
||||
Xmm rhs_y = invert_op_y ? SRC1 : SRC2;
|
||||
|
||||
// Compare X-component
|
||||
movaps(SCRATCH, lhs_x);
|
||||
cmpss(SCRATCH, rhs_x, cmp[op_x]);
|
||||
|
||||
// Compare Y-component
|
||||
cmpps(lhs_y, rhs_y, cmp[op_y]);
|
||||
|
||||
movq(COND0, SCRATCH);
|
||||
movq(COND1, lhs_y);
|
||||
}
|
||||
|
||||
shr(COND0.cvt32(), 31); // ignores upper 32 bits in source
|
||||
shr(COND1, 63);
|
||||
}
|
||||
|
||||
void JitShader::Compile_MAD(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.mad.src1, SRC1);
|
||||
|
||||
if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI) {
|
||||
Compile_SwizzleSrc(instr, 2, instr.mad.src2i, SRC2);
|
||||
Compile_SwizzleSrc(instr, 3, instr.mad.src3i, SRC3);
|
||||
} else {
|
||||
Compile_SwizzleSrc(instr, 2, instr.mad.src2, SRC2);
|
||||
Compile_SwizzleSrc(instr, 3, instr.mad.src3, SRC3);
|
||||
}
|
||||
|
||||
Compile_SanitizedMul(SRC1, SRC2, SCRATCH);
|
||||
addps(SRC1, SRC3);
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_IF(Instruction instr) {
|
||||
Compile_Assert(instr.flow_control.dest_offset >= program_counter,
|
||||
"Backwards if-statements not supported");
|
||||
Label l_else, l_endif;
|
||||
|
||||
// Evaluate the "IF" condition
|
||||
if (instr.opcode.Value() == OpCode::Id::IFU) {
|
||||
Compile_UniformCondition(instr);
|
||||
} else if (instr.opcode.Value() == OpCode::Id::IFC) {
|
||||
Compile_EvaluateCondition(instr);
|
||||
}
|
||||
jz(l_else, T_NEAR);
|
||||
|
||||
// Compile the code that corresponds to the condition evaluating as true
|
||||
Compile_Block(instr.flow_control.dest_offset);
|
||||
|
||||
// If there isn't an "ELSE" condition, we are done here
|
||||
if (instr.flow_control.num_instructions == 0) {
|
||||
L(l_else);
|
||||
return;
|
||||
}
|
||||
|
||||
jmp(l_endif, T_NEAR);
|
||||
|
||||
L(l_else);
|
||||
// This code corresponds to the "ELSE" condition
|
||||
// Comple the code that corresponds to the condition evaluating as false
|
||||
Compile_Block(instr.flow_control.dest_offset + instr.flow_control.num_instructions);
|
||||
|
||||
L(l_endif);
|
||||
}
|
||||
|
||||
void JitShader::Compile_LOOP(Instruction instr) {
|
||||
Compile_Assert(instr.flow_control.dest_offset >= program_counter,
|
||||
"Backwards loops not supported");
|
||||
Compile_Assert(!looping, "Nested loops not supported");
|
||||
|
||||
looping = true;
|
||||
|
||||
// This decodes the fields from the integer uniform at index instr.flow_control.int_uniform_id.
|
||||
// The Y (LOOPCOUNT_REG) and Z (LOOPINC) component are kept multiplied by 16 (Left shifted by
|
||||
// 4 bits) to be used as an offset into the 16-byte vector registers later
|
||||
size_t offset = ShaderSetup::GetIntUniformOffset(instr.flow_control.int_uniform_id);
|
||||
mov(LOOPCOUNT, dword[SETUP + offset]);
|
||||
mov(LOOPCOUNT_REG, LOOPCOUNT);
|
||||
shr(LOOPCOUNT_REG, 4);
|
||||
and(LOOPCOUNT_REG, 0xFF0); // Y-component is the start
|
||||
mov(LOOPINC, LOOPCOUNT);
|
||||
shr(LOOPINC, 12);
|
||||
and(LOOPINC, 0xFF0); // Z-component is the incrementer
|
||||
movzx(LOOPCOUNT, LOOPCOUNT.cvt8()); // X-component is iteration count
|
||||
add(LOOPCOUNT, 1); // Iteration count is X-component + 1
|
||||
|
||||
Label l_loop_start;
|
||||
L(l_loop_start);
|
||||
|
||||
Compile_Block(instr.flow_control.dest_offset + 1);
|
||||
|
||||
add(LOOPCOUNT_REG, LOOPINC); // Increment LOOPCOUNT_REG by Z-component
|
||||
sub(LOOPCOUNT, 1); // Increment loop count by 1
|
||||
jnz(l_loop_start); // Loop if not equal
|
||||
|
||||
looping = false;
|
||||
}
|
||||
|
||||
void JitShader::Compile_JMP(Instruction instr) {
|
||||
if (instr.opcode.Value() == OpCode::Id::JMPC)
|
||||
Compile_EvaluateCondition(instr);
|
||||
else if (instr.opcode.Value() == OpCode::Id::JMPU)
|
||||
Compile_UniformCondition(instr);
|
||||
else
|
||||
UNREACHABLE();
|
||||
|
||||
bool inverted_condition =
|
||||
(instr.opcode.Value() == OpCode::Id::JMPU) && (instr.flow_control.num_instructions & 1);
|
||||
|
||||
Label& b = instruction_labels[instr.flow_control.dest_offset];
|
||||
if (inverted_condition) {
|
||||
jz(b, T_NEAR);
|
||||
} else {
|
||||
jnz(b, T_NEAR);
|
||||
}
|
||||
}
|
||||
|
||||
void JitShader::Compile_Block(unsigned end) {
|
||||
while (program_counter < end) {
|
||||
Compile_NextInstr();
|
||||
}
|
||||
}
|
||||
|
||||
void JitShader::Compile_Return() {
|
||||
// Peek return offset on the stack and check if we're at that offset
|
||||
mov(rax, qword[rsp + 8]);
|
||||
cmp(eax, (program_counter));
|
||||
|
||||
// If so, jump back to before CALL
|
||||
Label b;
|
||||
jnz(b);
|
||||
ret();
|
||||
L(b);
|
||||
}
|
||||
|
||||
void JitShader::Compile_NextInstr() {
|
||||
if (std::binary_search(return_offsets.begin(), return_offsets.end(), program_counter)) {
|
||||
Compile_Return();
|
||||
}
|
||||
|
||||
L(instruction_labels[program_counter]);
|
||||
|
||||
Instruction instr = GetVertexShaderInstruction(program_counter++);
|
||||
|
||||
OpCode::Id opcode = instr.opcode.Value();
|
||||
auto instr_func = instr_table[static_cast<unsigned>(opcode)];
|
||||
|
||||
if (instr_func) {
|
||||
// JIT the instruction!
|
||||
((*this).*instr_func)(instr);
|
||||
} else {
|
||||
// Unhandled instruction
|
||||
LOG_CRITICAL(HW_GPU, "Unhandled instruction: 0x%02x (0x%08x)",
|
||||
instr.opcode.Value().EffectiveOpCode(), instr.hex);
|
||||
}
|
||||
}
|
||||
|
||||
void JitShader::FindReturnOffsets() {
|
||||
return_offsets.clear();
|
||||
|
||||
for (size_t offset = 0; offset < g_state.vs.program_code.size(); ++offset) {
|
||||
Instruction instr = GetVertexShaderInstruction(offset);
|
||||
|
||||
switch (instr.opcode.Value()) {
|
||||
case OpCode::Id::CALL:
|
||||
case OpCode::Id::CALLC:
|
||||
case OpCode::Id::CALLU:
|
||||
return_offsets.push_back(instr.flow_control.dest_offset +
|
||||
instr.flow_control.num_instructions);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
// Sort for efficient binary search later
|
||||
std::sort(return_offsets.begin(), return_offsets.end());
|
||||
}
|
||||
|
||||
void JitShader::Compile() {
|
||||
// Reset flow control state
|
||||
program = (CompiledShader*)getCurr();
|
||||
program_counter = 0;
|
||||
looping = false;
|
||||
instruction_labels.fill(Xbyak::Label());
|
||||
|
||||
// Find all `CALL` instructions and identify return locations
|
||||
FindReturnOffsets();
|
||||
|
||||
// The stack pointer is 8 modulo 16 at the entry of a procedure
|
||||
ABI_PushRegistersAndAdjustStack(*this, ABI_ALL_CALLEE_SAVED, 8);
|
||||
|
||||
mov(SETUP, ABI_PARAM1);
|
||||
mov(STATE, ABI_PARAM2);
|
||||
|
||||
// Zero address/loop registers
|
||||
xor(ADDROFFS_REG_0.cvt32(), ADDROFFS_REG_0.cvt32());
|
||||
xor(ADDROFFS_REG_1.cvt32(), ADDROFFS_REG_1.cvt32());
|
||||
xor(LOOPCOUNT_REG, LOOPCOUNT_REG);
|
||||
|
||||
// Used to set a register to one
|
||||
static const __m128 one = {1.f, 1.f, 1.f, 1.f};
|
||||
mov(rax, reinterpret_cast<size_t>(&one));
|
||||
movaps(ONE, xword[rax]);
|
||||
|
||||
// Used to negate registers
|
||||
static const __m128 neg = {-0.f, -0.f, -0.f, -0.f};
|
||||
mov(rax, reinterpret_cast<size_t>(&neg));
|
||||
movaps(NEGBIT, xword[rax]);
|
||||
|
||||
// Jump to start of the shader program
|
||||
jmp(ABI_PARAM3);
|
||||
|
||||
// Compile entire program
|
||||
Compile_Block(static_cast<unsigned>(g_state.vs.program_code.size()));
|
||||
|
||||
// Free memory that's no longer needed
|
||||
return_offsets.clear();
|
||||
return_offsets.shrink_to_fit();
|
||||
|
||||
ready();
|
||||
|
||||
uintptr_t size = reinterpret_cast<uintptr_t>(getCurr()) - reinterpret_cast<uintptr_t>(program);
|
||||
ASSERT_MSG(size <= MAX_SHADER_SIZE, "Compiled a shader that exceeds the allocated size!");
|
||||
LOG_DEBUG(HW_GPU, "Compiled shader size=%lu", size);
|
||||
}
|
||||
|
||||
JitShader::JitShader() : Xbyak::CodeGenerator(MAX_SHADER_SIZE) {}
|
||||
|
||||
} // namespace Shader
|
||||
|
||||
} // namespace Pica
|
||||
|
||||
@ -1,121 +1,30 @@
|
||||
// Copyright 2015 Citra Emulator Project
|
||||
// Copyright 2016 Citra Emulator Project
|
||||
// Licensed under GPLv2 or any later version
|
||||
// Refer to the license.txt file included.
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <array>
|
||||
#include <cstddef>
|
||||
#include <utility>
|
||||
#include <vector>
|
||||
#include <nihstro/shader_bytecode.h>
|
||||
#include <xbyak.h>
|
||||
#include "common/bit_set.h"
|
||||
#include <memory>
|
||||
#include <unordered_map>
|
||||
#include "common/common_types.h"
|
||||
#include "common/x64/emitter.h"
|
||||
#include "video_core/shader/shader.h"
|
||||
|
||||
using nihstro::Instruction;
|
||||
using nihstro::OpCode;
|
||||
using nihstro::SwizzlePattern;
|
||||
|
||||
namespace Pica {
|
||||
|
||||
namespace Shader {
|
||||
|
||||
/// Memory allocated for each compiled shader (64Kb)
|
||||
constexpr size_t MAX_SHADER_SIZE = 1024 * 64;
|
||||
class JitShader;
|
||||
|
||||
/**
|
||||
* This class implements the shader JIT compiler. It recompiles a Pica shader program into x86_64
|
||||
* code that can be executed on the host machine directly.
|
||||
*/
|
||||
class JitShader : public Xbyak::CodeGenerator {
|
||||
class JitX64Engine final : public ShaderEngine {
|
||||
public:
|
||||
JitShader();
|
||||
JitX64Engine();
|
||||
~JitX64Engine() override;
|
||||
|
||||
void Run(const ShaderSetup& setup, UnitState& state, unsigned offset) const {
|
||||
program(&setup, &state, instruction_labels[offset].getAddress());
|
||||
}
|
||||
|
||||
void Compile();
|
||||
|
||||
void Compile_ADD(Instruction instr);
|
||||
void Compile_DP3(Instruction instr);
|
||||
void Compile_DP4(Instruction instr);
|
||||
void Compile_DPH(Instruction instr);
|
||||
void Compile_EX2(Instruction instr);
|
||||
void Compile_LG2(Instruction instr);
|
||||
void Compile_MUL(Instruction instr);
|
||||
void Compile_SGE(Instruction instr);
|
||||
void Compile_SLT(Instruction instr);
|
||||
void Compile_FLR(Instruction instr);
|
||||
void Compile_MAX(Instruction instr);
|
||||
void Compile_MIN(Instruction instr);
|
||||
void Compile_RCP(Instruction instr);
|
||||
void Compile_RSQ(Instruction instr);
|
||||
void Compile_MOVA(Instruction instr);
|
||||
void Compile_MOV(Instruction instr);
|
||||
void Compile_NOP(Instruction instr);
|
||||
void Compile_END(Instruction instr);
|
||||
void Compile_CALL(Instruction instr);
|
||||
void Compile_CALLC(Instruction instr);
|
||||
void Compile_CALLU(Instruction instr);
|
||||
void Compile_IF(Instruction instr);
|
||||
void Compile_LOOP(Instruction instr);
|
||||
void Compile_JMP(Instruction instr);
|
||||
void Compile_CMP(Instruction instr);
|
||||
void Compile_MAD(Instruction instr);
|
||||
void SetupBatch(ShaderSetup& setup, unsigned int entry_point) override;
|
||||
void Run(const ShaderSetup& setup, UnitState& state) const override;
|
||||
|
||||
private:
|
||||
void Compile_Block(unsigned end);
|
||||
void Compile_NextInstr();
|
||||
|
||||
void Compile_SwizzleSrc(Instruction instr, unsigned src_num, SourceRegister src_reg,
|
||||
Xbyak::Xmm dest);
|
||||
void Compile_DestEnable(Instruction instr, Xbyak::Xmm dest);
|
||||
|
||||
/**
|
||||
* Compiles a `MUL src1, src2` operation, properly handling the PICA semantics when multiplying
|
||||
* zero by inf. Clobbers `src2` and `scratch`.
|
||||
*/
|
||||
void Compile_SanitizedMul(Xbyak::Xmm src1, Xbyak::Xmm src2, Xbyak::Xmm scratch);
|
||||
|
||||
void Compile_EvaluateCondition(Instruction instr);
|
||||
void Compile_UniformCondition(Instruction instr);
|
||||
|
||||
/**
|
||||
* Emits the code to conditionally return from a subroutine envoked by the `CALL` instruction.
|
||||
*/
|
||||
void Compile_Return();
|
||||
|
||||
BitSet32 PersistentCallerSavedRegs();
|
||||
|
||||
/**
|
||||
* Assertion evaluated at compile-time, but only triggered if executed at runtime.
|
||||
* @param msg Message to be logged if the assertion fails.
|
||||
*/
|
||||
void Compile_Assert(bool condition, const char* msg);
|
||||
|
||||
/**
|
||||
* Analyzes the entire shader program for `CALL` instructions before emitting any code,
|
||||
* identifying the locations where a return needs to be inserted.
|
||||
*/
|
||||
void FindReturnOffsets();
|
||||
|
||||
/// Mapping of Pica VS instructions to pointers in the emitted code
|
||||
std::array<Xbyak::Label, 1024> instruction_labels;
|
||||
|
||||
/// Offsets in code where a return needs to be inserted
|
||||
std::vector<unsigned> return_offsets;
|
||||
|
||||
unsigned program_counter = 0; ///< Offset of the next instruction to decode
|
||||
bool looping = false; ///< True if compiling a loop, used to check for nested loops
|
||||
|
||||
using CompiledShader = void(const void* setup, void* state, const u8* start_addr);
|
||||
CompiledShader* program = nullptr;
|
||||
std::unordered_map<u64, std::unique_ptr<JitShader>> cache;
|
||||
};
|
||||
|
||||
} // Shader
|
||||
|
||||
} // Pica
|
||||
} // namespace Shader
|
||||
} // namespace Pica
|
||||
|
||||
@ -0,0 +1,884 @@
|
||||
// Copyright 2015 Citra Emulator Project
|
||||
// Licensed under GPLv2 or any later version
|
||||
// Refer to the license.txt file included.
|
||||
|
||||
#include <algorithm>
|
||||
#include <cmath>
|
||||
#include <cstdint>
|
||||
#include <nihstro/shader_bytecode.h>
|
||||
#include <smmintrin.h>
|
||||
#include <xmmintrin.h>
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "common/vector_math.h"
|
||||
#include "common/x64/cpu_detect.h"
|
||||
#include "common/x64/xbyak_abi.h"
|
||||
#include "common/x64/xbyak_util.h"
|
||||
#include "video_core/pica_state.h"
|
||||
#include "video_core/pica_types.h"
|
||||
#include "video_core/shader/shader.h"
|
||||
#include "video_core/shader/shader_jit_x64_compiler.h"
|
||||
|
||||
using namespace Common::X64;
|
||||
using namespace Xbyak::util;
|
||||
using Xbyak::Label;
|
||||
using Xbyak::Reg32;
|
||||
using Xbyak::Reg64;
|
||||
using Xbyak::Xmm;
|
||||
|
||||
namespace Pica {
|
||||
|
||||
namespace Shader {
|
||||
|
||||
typedef void (JitShader::*JitFunction)(Instruction instr);
|
||||
|
||||
const JitFunction instr_table[64] = {
|
||||
&JitShader::Compile_ADD, // add
|
||||
&JitShader::Compile_DP3, // dp3
|
||||
&JitShader::Compile_DP4, // dp4
|
||||
&JitShader::Compile_DPH, // dph
|
||||
nullptr, // unknown
|
||||
&JitShader::Compile_EX2, // ex2
|
||||
&JitShader::Compile_LG2, // lg2
|
||||
nullptr, // unknown
|
||||
&JitShader::Compile_MUL, // mul
|
||||
&JitShader::Compile_SGE, // sge
|
||||
&JitShader::Compile_SLT, // slt
|
||||
&JitShader::Compile_FLR, // flr
|
||||
&JitShader::Compile_MAX, // max
|
||||
&JitShader::Compile_MIN, // min
|
||||
&JitShader::Compile_RCP, // rcp
|
||||
&JitShader::Compile_RSQ, // rsq
|
||||
nullptr, // unknown
|
||||
nullptr, // unknown
|
||||
&JitShader::Compile_MOVA, // mova
|
||||
&JitShader::Compile_MOV, // mov
|
||||
nullptr, // unknown
|
||||
nullptr, // unknown
|
||||
nullptr, // unknown
|
||||
nullptr, // unknown
|
||||
&JitShader::Compile_DPH, // dphi
|
||||
nullptr, // unknown
|
||||
&JitShader::Compile_SGE, // sgei
|
||||
&JitShader::Compile_SLT, // slti
|
||||
nullptr, // unknown
|
||||
nullptr, // unknown
|
||||
nullptr, // unknown
|
||||
nullptr, // unknown
|
||||
nullptr, // unknown
|
||||
&JitShader::Compile_NOP, // nop
|
||||
&JitShader::Compile_END, // end
|
||||
nullptr, // break
|
||||
&JitShader::Compile_CALL, // call
|
||||
&JitShader::Compile_CALLC, // callc
|
||||
&JitShader::Compile_CALLU, // callu
|
||||
&JitShader::Compile_IF, // ifu
|
||||
&JitShader::Compile_IF, // ifc
|
||||
&JitShader::Compile_LOOP, // loop
|
||||
nullptr, // emit
|
||||
nullptr, // sete
|
||||
&JitShader::Compile_JMP, // jmpc
|
||||
&JitShader::Compile_JMP, // jmpu
|
||||
&JitShader::Compile_CMP, // cmp
|
||||
&JitShader::Compile_CMP, // cmp
|
||||
&JitShader::Compile_MAD, // madi
|
||||
&JitShader::Compile_MAD, // madi
|
||||
&JitShader::Compile_MAD, // madi
|
||||
&JitShader::Compile_MAD, // madi
|
||||
&JitShader::Compile_MAD, // madi
|
||||
&JitShader::Compile_MAD, // madi
|
||||
&JitShader::Compile_MAD, // madi
|
||||
&JitShader::Compile_MAD, // madi
|
||||
&JitShader::Compile_MAD, // mad
|
||||
&JitShader::Compile_MAD, // mad
|
||||
&JitShader::Compile_MAD, // mad
|
||||
&JitShader::Compile_MAD, // mad
|
||||
&JitShader::Compile_MAD, // mad
|
||||
&JitShader::Compile_MAD, // mad
|
||||
&JitShader::Compile_MAD, // mad
|
||||
&JitShader::Compile_MAD, // mad
|
||||
};
|
||||
|
||||
// The following is used to alias some commonly used registers. Generally, RAX-RDX and XMM0-XMM3 can
|
||||
// be used as scratch registers within a compiler function. The other registers have designated
|
||||
// purposes, as documented below:
|
||||
|
||||
/// Pointer to the uniform memory
|
||||
static const Reg64 SETUP = r9;
|
||||
/// The two 32-bit VS address offset registers set by the MOVA instruction
|
||||
static const Reg64 ADDROFFS_REG_0 = r10;
|
||||
static const Reg64 ADDROFFS_REG_1 = r11;
|
||||
/// VS loop count register (Multiplied by 16)
|
||||
static const Reg32 LOOPCOUNT_REG = r12d;
|
||||
/// Current VS loop iteration number (we could probably use LOOPCOUNT_REG, but this quicker)
|
||||
static const Reg32 LOOPCOUNT = esi;
|
||||
/// Number to increment LOOPCOUNT_REG by on each loop iteration (Multiplied by 16)
|
||||
static const Reg32 LOOPINC = edi;
|
||||
/// Result of the previous CMP instruction for the X-component comparison
|
||||
static const Reg64 COND0 = r13;
|
||||
/// Result of the previous CMP instruction for the Y-component comparison
|
||||
static const Reg64 COND1 = r14;
|
||||
/// Pointer to the UnitState instance for the current VS unit
|
||||
static const Reg64 STATE = r15;
|
||||
/// SIMD scratch register
|
||||
static const Xmm SCRATCH = xmm0;
|
||||
/// Loaded with the first swizzled source register, otherwise can be used as a scratch register
|
||||
static const Xmm SRC1 = xmm1;
|
||||
/// Loaded with the second swizzled source register, otherwise can be used as a scratch register
|
||||
static const Xmm SRC2 = xmm2;
|
||||
/// Loaded with the third swizzled source register, otherwise can be used as a scratch register
|
||||
static const Xmm SRC3 = xmm3;
|
||||
/// Additional scratch register
|
||||
static const Xmm SCRATCH2 = xmm4;
|
||||
/// Constant vector of [1.0f, 1.0f, 1.0f, 1.0f], used to efficiently set a vector to one
|
||||
static const Xmm ONE = xmm14;
|
||||
/// Constant vector of [-0.f, -0.f, -0.f, -0.f], used to efficiently negate a vector with XOR
|
||||
static const Xmm NEGBIT = xmm15;
|
||||
|
||||
// State registers that must not be modified by external functions calls
|
||||
// Scratch registers, e.g., SRC1 and SCRATCH, have to be saved on the side if needed
|
||||
static const BitSet32 persistent_regs = BuildRegSet({
|
||||
// Pointers to register blocks
|
||||
SETUP, STATE,
|
||||
// Cached registers
|
||||
ADDROFFS_REG_0, ADDROFFS_REG_1, LOOPCOUNT_REG, COND0, COND1,
|
||||
// Constants
|
||||
ONE, NEGBIT,
|
||||
});
|
||||
|
||||
/// Raw constant for the source register selector that indicates no swizzling is performed
|
||||
static const u8 NO_SRC_REG_SWIZZLE = 0x1b;
|
||||
/// Raw constant for the destination register enable mask that indicates all components are enabled
|
||||
static const u8 NO_DEST_REG_MASK = 0xf;
|
||||
|
||||
static void LogCritical(const char* msg) {
|
||||
LOG_CRITICAL(HW_GPU, "%s", msg);
|
||||
}
|
||||
|
||||
void JitShader::Compile_Assert(bool condition, const char* msg) {
|
||||
if (!condition) {
|
||||
mov(ABI_PARAM1, reinterpret_cast<size_t>(msg));
|
||||
CallFarFunction(*this, LogCritical);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Loads and swizzles a source register into the specified XMM register.
|
||||
* @param instr VS instruction, used for determining how to load the source register
|
||||
* @param src_num Number indicating which source register to load (1 = src1, 2 = src2, 3 = src3)
|
||||
* @param src_reg SourceRegister object corresponding to the source register to load
|
||||
* @param dest Destination XMM register to store the loaded, swizzled source register
|
||||
*/
|
||||
void JitShader::Compile_SwizzleSrc(Instruction instr, unsigned src_num, SourceRegister src_reg,
|
||||
Xmm dest) {
|
||||
Reg64 src_ptr;
|
||||
size_t src_offset;
|
||||
|
||||
if (src_reg.GetRegisterType() == RegisterType::FloatUniform) {
|
||||
src_ptr = SETUP;
|
||||
src_offset = ShaderSetup::GetFloatUniformOffset(src_reg.GetIndex());
|
||||
} else {
|
||||
src_ptr = STATE;
|
||||
src_offset = UnitState::InputOffset(src_reg);
|
||||
}
|
||||
|
||||
int src_offset_disp = (int)src_offset;
|
||||
ASSERT_MSG(src_offset == src_offset_disp, "Source register offset too large for int type");
|
||||
|
||||
unsigned operand_desc_id;
|
||||
|
||||
const bool is_inverted =
|
||||
(0 != (instr.opcode.Value().GetInfo().subtype & OpCode::Info::SrcInversed));
|
||||
|
||||
unsigned address_register_index;
|
||||
unsigned offset_src;
|
||||
|
||||
if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MAD ||
|
||||
instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI) {
|
||||
operand_desc_id = instr.mad.operand_desc_id;
|
||||
offset_src = is_inverted ? 3 : 2;
|
||||
address_register_index = instr.mad.address_register_index;
|
||||
} else {
|
||||
operand_desc_id = instr.common.operand_desc_id;
|
||||
offset_src = is_inverted ? 2 : 1;
|
||||
address_register_index = instr.common.address_register_index;
|
||||
}
|
||||
|
||||
if (src_num == offset_src && address_register_index != 0) {
|
||||
switch (address_register_index) {
|
||||
case 1: // address offset 1
|
||||
movaps(dest, xword[src_ptr + ADDROFFS_REG_0 + src_offset_disp]);
|
||||
break;
|
||||
case 2: // address offset 2
|
||||
movaps(dest, xword[src_ptr + ADDROFFS_REG_1 + src_offset_disp]);
|
||||
break;
|
||||
case 3: // address offset 3
|
||||
movaps(dest, xword[src_ptr + LOOPCOUNT_REG.cvt64() + src_offset_disp]);
|
||||
break;
|
||||
default:
|
||||
UNREACHABLE();
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
// Load the source
|
||||
movaps(dest, xword[src_ptr + src_offset_disp]);
|
||||
}
|
||||
|
||||
SwizzlePattern swiz = {(*swizzle_data)[operand_desc_id]};
|
||||
|
||||
// Generate instructions for source register swizzling as needed
|
||||
u8 sel = swiz.GetRawSelector(src_num);
|
||||
if (sel != NO_SRC_REG_SWIZZLE) {
|
||||
// Selector component order needs to be reversed for the SHUFPS instruction
|
||||
sel = ((sel & 0xc0) >> 6) | ((sel & 3) << 6) | ((sel & 0xc) << 2) | ((sel & 0x30) >> 2);
|
||||
|
||||
// Shuffle inputs for swizzle
|
||||
shufps(dest, dest, sel);
|
||||
}
|
||||
|
||||
// If the source register should be negated, flip the negative bit using XOR
|
||||
const bool negate[] = {swiz.negate_src1, swiz.negate_src2, swiz.negate_src3};
|
||||
if (negate[src_num - 1]) {
|
||||
xorps(dest, NEGBIT);
|
||||
}
|
||||
}
|
||||
|
||||
void JitShader::Compile_DestEnable(Instruction instr, Xmm src) {
|
||||
DestRegister dest;
|
||||
unsigned operand_desc_id;
|
||||
if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MAD ||
|
||||
instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI) {
|
||||
operand_desc_id = instr.mad.operand_desc_id;
|
||||
dest = instr.mad.dest.Value();
|
||||
} else {
|
||||
operand_desc_id = instr.common.operand_desc_id;
|
||||
dest = instr.common.dest.Value();
|
||||
}
|
||||
|
||||
SwizzlePattern swiz = {(*swizzle_data)[operand_desc_id]};
|
||||
|
||||
size_t dest_offset_disp = UnitState::OutputOffset(dest);
|
||||
|
||||
// If all components are enabled, write the result to the destination register
|
||||
if (swiz.dest_mask == NO_DEST_REG_MASK) {
|
||||
// Store dest back to memory
|
||||
movaps(xword[STATE + dest_offset_disp], src);
|
||||
|
||||
} else {
|
||||
// Not all components are enabled, so mask the result when storing to the destination
|
||||
// register...
|
||||
movaps(SCRATCH, xword[STATE + dest_offset_disp]);
|
||||
|
||||
if (Common::GetCPUCaps().sse4_1) {
|
||||
u8 mask = ((swiz.dest_mask & 1) << 3) | ((swiz.dest_mask & 8) >> 3) |
|
||||
((swiz.dest_mask & 2) << 1) | ((swiz.dest_mask & 4) >> 1);
|
||||
blendps(SCRATCH, src, mask);
|
||||
} else {
|
||||
movaps(SCRATCH2, src);
|
||||
unpckhps(SCRATCH2, SCRATCH); // Unpack X/Y components of source and destination
|
||||
unpcklps(SCRATCH, src); // Unpack Z/W components of source and destination
|
||||
|
||||
// Compute selector to selectively copy source components to destination for SHUFPS
|
||||
// instruction
|
||||
u8 sel = ((swiz.DestComponentEnabled(0) ? 1 : 0) << 0) |
|
||||
((swiz.DestComponentEnabled(1) ? 3 : 2) << 2) |
|
||||
((swiz.DestComponentEnabled(2) ? 0 : 1) << 4) |
|
||||
((swiz.DestComponentEnabled(3) ? 2 : 3) << 6);
|
||||
shufps(SCRATCH, SCRATCH2, sel);
|
||||
}
|
||||
|
||||
// Store dest back to memory
|
||||
movaps(xword[STATE + dest_offset_disp], SCRATCH);
|
||||
}
|
||||
}
|
||||
|
||||
void JitShader::Compile_SanitizedMul(Xmm src1, Xmm src2, Xmm scratch) {
|
||||
movaps(scratch, src1);
|
||||
cmpordps(scratch, src2);
|
||||
|
||||
mulps(src1, src2);
|
||||
|
||||
movaps(src2, src1);
|
||||
cmpunordps(src2, src2);
|
||||
|
||||
xorps(scratch, src2);
|
||||
andps(src1, scratch);
|
||||
}
|
||||
|
||||
void JitShader::Compile_EvaluateCondition(Instruction instr) {
|
||||
// Note: NXOR is used below to check for equality
|
||||
switch (instr.flow_control.op) {
|
||||
case Instruction::FlowControlType::Or:
|
||||
mov(eax, COND0);
|
||||
mov(ebx, COND1);
|
||||
xor(eax, (instr.flow_control.refx.Value() ^ 1));
|
||||
xor(ebx, (instr.flow_control.refy.Value() ^ 1));
|
||||
or (eax, ebx);
|
||||
break;
|
||||
|
||||
case Instruction::FlowControlType::And:
|
||||
mov(eax, COND0);
|
||||
mov(ebx, COND1);
|
||||
xor(eax, (instr.flow_control.refx.Value() ^ 1));
|
||||
xor(ebx, (instr.flow_control.refy.Value() ^ 1));
|
||||
and(eax, ebx);
|
||||
break;
|
||||
|
||||
case Instruction::FlowControlType::JustX:
|
||||
mov(eax, COND0);
|
||||
xor(eax, (instr.flow_control.refx.Value() ^ 1));
|
||||
break;
|
||||
|
||||
case Instruction::FlowControlType::JustY:
|
||||
mov(eax, COND1);
|
||||
xor(eax, (instr.flow_control.refy.Value() ^ 1));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void JitShader::Compile_UniformCondition(Instruction instr) {
|
||||
size_t offset = ShaderSetup::GetBoolUniformOffset(instr.flow_control.bool_uniform_id);
|
||||
cmp(byte[SETUP + offset], 0);
|
||||
}
|
||||
|
||||
BitSet32 JitShader::PersistentCallerSavedRegs() {
|
||||
return persistent_regs & ABI_ALL_CALLER_SAVED;
|
||||
}
|
||||
|
||||
void JitShader::Compile_ADD(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
addps(SRC1, SRC2);
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_DP3(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
|
||||
Compile_SanitizedMul(SRC1, SRC2, SCRATCH);
|
||||
|
||||
movaps(SRC2, SRC1);
|
||||
shufps(SRC2, SRC2, _MM_SHUFFLE(1, 1, 1, 1));
|
||||
|
||||
movaps(SRC3, SRC1);
|
||||
shufps(SRC3, SRC3, _MM_SHUFFLE(2, 2, 2, 2));
|
||||
|
||||
shufps(SRC1, SRC1, _MM_SHUFFLE(0, 0, 0, 0));
|
||||
addps(SRC1, SRC2);
|
||||
addps(SRC1, SRC3);
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_DP4(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
|
||||
Compile_SanitizedMul(SRC1, SRC2, SCRATCH);
|
||||
|
||||
movaps(SRC2, SRC1);
|
||||
shufps(SRC1, SRC1, _MM_SHUFFLE(2, 3, 0, 1)); // XYZW -> ZWXY
|
||||
addps(SRC1, SRC2);
|
||||
|
||||
movaps(SRC2, SRC1);
|
||||
shufps(SRC1, SRC1, _MM_SHUFFLE(0, 1, 2, 3)); // XYZW -> WZYX
|
||||
addps(SRC1, SRC2);
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_DPH(Instruction instr) {
|
||||
if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::DPHI) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1i, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2i, SRC2);
|
||||
} else {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
}
|
||||
|
||||
if (Common::GetCPUCaps().sse4_1) {
|
||||
// Set 4th component to 1.0
|
||||
blendps(SRC1, ONE, 0b1000);
|
||||
} else {
|
||||
// Set 4th component to 1.0
|
||||
movaps(SCRATCH, SRC1);
|
||||
unpckhps(SCRATCH, ONE); // XYZW, 1111 -> Z1__
|
||||
unpcklpd(SRC1, SCRATCH); // XYZW, Z1__ -> XYZ1
|
||||
}
|
||||
|
||||
Compile_SanitizedMul(SRC1, SRC2, SCRATCH);
|
||||
|
||||
movaps(SRC2, SRC1);
|
||||
shufps(SRC1, SRC1, _MM_SHUFFLE(2, 3, 0, 1)); // XYZW -> ZWXY
|
||||
addps(SRC1, SRC2);
|
||||
|
||||
movaps(SRC2, SRC1);
|
||||
shufps(SRC1, SRC1, _MM_SHUFFLE(0, 1, 2, 3)); // XYZW -> WZYX
|
||||
addps(SRC1, SRC2);
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_EX2(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
movss(xmm0, SRC1); // ABI_PARAM1
|
||||
|
||||
ABI_PushRegistersAndAdjustStack(*this, PersistentCallerSavedRegs(), 0);
|
||||
CallFarFunction(*this, exp2f);
|
||||
ABI_PopRegistersAndAdjustStack(*this, PersistentCallerSavedRegs(), 0);
|
||||
|
||||
shufps(xmm0, xmm0, _MM_SHUFFLE(0, 0, 0, 0)); // ABI_RETURN
|
||||
movaps(SRC1, xmm0);
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_LG2(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
movss(xmm0, SRC1); // ABI_PARAM1
|
||||
|
||||
ABI_PushRegistersAndAdjustStack(*this, PersistentCallerSavedRegs(), 0);
|
||||
CallFarFunction(*this, log2f);
|
||||
ABI_PopRegistersAndAdjustStack(*this, PersistentCallerSavedRegs(), 0);
|
||||
|
||||
shufps(xmm0, xmm0, _MM_SHUFFLE(0, 0, 0, 0)); // ABI_RETURN
|
||||
movaps(SRC1, xmm0);
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_MUL(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
Compile_SanitizedMul(SRC1, SRC2, SCRATCH);
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_SGE(Instruction instr) {
|
||||
if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::SGEI) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1i, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2i, SRC2);
|
||||
} else {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
}
|
||||
|
||||
cmpleps(SRC2, SRC1);
|
||||
andps(SRC2, ONE);
|
||||
|
||||
Compile_DestEnable(instr, SRC2);
|
||||
}
|
||||
|
||||
void JitShader::Compile_SLT(Instruction instr) {
|
||||
if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::SLTI) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1i, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2i, SRC2);
|
||||
} else {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
}
|
||||
|
||||
cmpltps(SRC1, SRC2);
|
||||
andps(SRC1, ONE);
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_FLR(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
|
||||
if (Common::GetCPUCaps().sse4_1) {
|
||||
roundps(SRC1, SRC1, _MM_FROUND_FLOOR);
|
||||
} else {
|
||||
cvttps2dq(SRC1, SRC1);
|
||||
cvtdq2ps(SRC1, SRC1);
|
||||
}
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_MAX(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
// SSE semantics match PICA200 ones: In case of NaN, SRC2 is returned.
|
||||
maxps(SRC1, SRC2);
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_MIN(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
// SSE semantics match PICA200 ones: In case of NaN, SRC2 is returned.
|
||||
minps(SRC1, SRC2);
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_MOVA(Instruction instr) {
|
||||
SwizzlePattern swiz = {(*swizzle_data)[instr.common.operand_desc_id]};
|
||||
|
||||
if (!swiz.DestComponentEnabled(0) && !swiz.DestComponentEnabled(1)) {
|
||||
return; // NoOp
|
||||
}
|
||||
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
|
||||
// Convert floats to integers using truncation (only care about X and Y components)
|
||||
cvttps2dq(SRC1, SRC1);
|
||||
|
||||
// Get result
|
||||
movq(rax, SRC1);
|
||||
|
||||
// Handle destination enable
|
||||
if (swiz.DestComponentEnabled(0) && swiz.DestComponentEnabled(1)) {
|
||||
// Move and sign-extend low 32 bits
|
||||
movsxd(ADDROFFS_REG_0, eax);
|
||||
|
||||
// Move and sign-extend high 32 bits
|
||||
shr(rax, 32);
|
||||
movsxd(ADDROFFS_REG_1, eax);
|
||||
|
||||
// Multiply by 16 to be used as an offset later
|
||||
shl(ADDROFFS_REG_0, 4);
|
||||
shl(ADDROFFS_REG_1, 4);
|
||||
} else {
|
||||
if (swiz.DestComponentEnabled(0)) {
|
||||
// Move and sign-extend low 32 bits
|
||||
movsxd(ADDROFFS_REG_0, eax);
|
||||
|
||||
// Multiply by 16 to be used as an offset later
|
||||
shl(ADDROFFS_REG_0, 4);
|
||||
} else if (swiz.DestComponentEnabled(1)) {
|
||||
// Move and sign-extend high 32 bits
|
||||
shr(rax, 32);
|
||||
movsxd(ADDROFFS_REG_1, eax);
|
||||
|
||||
// Multiply by 16 to be used as an offset later
|
||||
shl(ADDROFFS_REG_1, 4);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void JitShader::Compile_MOV(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_RCP(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
|
||||
// TODO(bunnei): RCPSS is a pretty rough approximation, this might cause problems if Pica
|
||||
// performs this operation more accurately. This should be checked on hardware.
|
||||
rcpss(SRC1, SRC1);
|
||||
shufps(SRC1, SRC1, _MM_SHUFFLE(0, 0, 0, 0)); // XYWZ -> XXXX
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_RSQ(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
|
||||
// TODO(bunnei): RSQRTSS is a pretty rough approximation, this might cause problems if Pica
|
||||
// performs this operation more accurately. This should be checked on hardware.
|
||||
rsqrtss(SRC1, SRC1);
|
||||
shufps(SRC1, SRC1, _MM_SHUFFLE(0, 0, 0, 0)); // XYWZ -> XXXX
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_NOP(Instruction instr) {}
|
||||
|
||||
void JitShader::Compile_END(Instruction instr) {
|
||||
ABI_PopRegistersAndAdjustStack(*this, ABI_ALL_CALLEE_SAVED, 8);
|
||||
ret();
|
||||
}
|
||||
|
||||
void JitShader::Compile_CALL(Instruction instr) {
|
||||
// Push offset of the return
|
||||
push(qword, (instr.flow_control.dest_offset + instr.flow_control.num_instructions));
|
||||
|
||||
// Call the subroutine
|
||||
call(instruction_labels[instr.flow_control.dest_offset]);
|
||||
|
||||
// Skip over the return offset that's on the stack
|
||||
add(rsp, 8);
|
||||
}
|
||||
|
||||
void JitShader::Compile_CALLC(Instruction instr) {
|
||||
Compile_EvaluateCondition(instr);
|
||||
Label b;
|
||||
jz(b);
|
||||
Compile_CALL(instr);
|
||||
L(b);
|
||||
}
|
||||
|
||||
void JitShader::Compile_CALLU(Instruction instr) {
|
||||
Compile_UniformCondition(instr);
|
||||
Label b;
|
||||
jz(b);
|
||||
Compile_CALL(instr);
|
||||
L(b);
|
||||
}
|
||||
|
||||
void JitShader::Compile_CMP(Instruction instr) {
|
||||
using Op = Instruction::Common::CompareOpType::Op;
|
||||
Op op_x = instr.common.compare_op.x;
|
||||
Op op_y = instr.common.compare_op.y;
|
||||
|
||||
Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1);
|
||||
Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2);
|
||||
|
||||
// SSE doesn't have greater-than (GT) or greater-equal (GE) comparison operators. You need to
|
||||
// emulate them by swapping the lhs and rhs and using LT and LE. NLT and NLE can't be used here
|
||||
// because they don't match when used with NaNs.
|
||||
static const u8 cmp[] = {CMP_EQ, CMP_NEQ, CMP_LT, CMP_LE, CMP_LT, CMP_LE};
|
||||
|
||||
bool invert_op_x = (op_x == Op::GreaterThan || op_x == Op::GreaterEqual);
|
||||
Xmm lhs_x = invert_op_x ? SRC2 : SRC1;
|
||||
Xmm rhs_x = invert_op_x ? SRC1 : SRC2;
|
||||
|
||||
if (op_x == op_y) {
|
||||
// Compare X-component and Y-component together
|
||||
cmpps(lhs_x, rhs_x, cmp[op_x]);
|
||||
movq(COND0, lhs_x);
|
||||
|
||||
mov(COND1, COND0);
|
||||
} else {
|
||||
bool invert_op_y = (op_y == Op::GreaterThan || op_y == Op::GreaterEqual);
|
||||
Xmm lhs_y = invert_op_y ? SRC2 : SRC1;
|
||||
Xmm rhs_y = invert_op_y ? SRC1 : SRC2;
|
||||
|
||||
// Compare X-component
|
||||
movaps(SCRATCH, lhs_x);
|
||||
cmpss(SCRATCH, rhs_x, cmp[op_x]);
|
||||
|
||||
// Compare Y-component
|
||||
cmpps(lhs_y, rhs_y, cmp[op_y]);
|
||||
|
||||
movq(COND0, SCRATCH);
|
||||
movq(COND1, lhs_y);
|
||||
}
|
||||
|
||||
shr(COND0.cvt32(), 31); // ignores upper 32 bits in source
|
||||
shr(COND1, 63);
|
||||
}
|
||||
|
||||
void JitShader::Compile_MAD(Instruction instr) {
|
||||
Compile_SwizzleSrc(instr, 1, instr.mad.src1, SRC1);
|
||||
|
||||
if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI) {
|
||||
Compile_SwizzleSrc(instr, 2, instr.mad.src2i, SRC2);
|
||||
Compile_SwizzleSrc(instr, 3, instr.mad.src3i, SRC3);
|
||||
} else {
|
||||
Compile_SwizzleSrc(instr, 2, instr.mad.src2, SRC2);
|
||||
Compile_SwizzleSrc(instr, 3, instr.mad.src3, SRC3);
|
||||
}
|
||||
|
||||
Compile_SanitizedMul(SRC1, SRC2, SCRATCH);
|
||||
addps(SRC1, SRC3);
|
||||
|
||||
Compile_DestEnable(instr, SRC1);
|
||||
}
|
||||
|
||||
void JitShader::Compile_IF(Instruction instr) {
|
||||
Compile_Assert(instr.flow_control.dest_offset >= program_counter,
|
||||
"Backwards if-statements not supported");
|
||||
Label l_else, l_endif;
|
||||
|
||||
// Evaluate the "IF" condition
|
||||
if (instr.opcode.Value() == OpCode::Id::IFU) {
|
||||
Compile_UniformCondition(instr);
|
||||
} else if (instr.opcode.Value() == OpCode::Id::IFC) {
|
||||
Compile_EvaluateCondition(instr);
|
||||
}
|
||||
jz(l_else, T_NEAR);
|
||||
|
||||
// Compile the code that corresponds to the condition evaluating as true
|
||||
Compile_Block(instr.flow_control.dest_offset);
|
||||
|
||||
// If there isn't an "ELSE" condition, we are done here
|
||||
if (instr.flow_control.num_instructions == 0) {
|
||||
L(l_else);
|
||||
return;
|
||||
}
|
||||
|
||||
jmp(l_endif, T_NEAR);
|
||||
|
||||
L(l_else);
|
||||
// This code corresponds to the "ELSE" condition
|
||||
// Comple the code that corresponds to the condition evaluating as false
|
||||
Compile_Block(instr.flow_control.dest_offset + instr.flow_control.num_instructions);
|
||||
|
||||
L(l_endif);
|
||||
}
|
||||
|
||||
void JitShader::Compile_LOOP(Instruction instr) {
|
||||
Compile_Assert(instr.flow_control.dest_offset >= program_counter,
|
||||
"Backwards loops not supported");
|
||||
Compile_Assert(!looping, "Nested loops not supported");
|
||||
|
||||
looping = true;
|
||||
|
||||
// This decodes the fields from the integer uniform at index instr.flow_control.int_uniform_id.
|
||||
// The Y (LOOPCOUNT_REG) and Z (LOOPINC) component are kept multiplied by 16 (Left shifted by
|
||||
// 4 bits) to be used as an offset into the 16-byte vector registers later
|
||||
size_t offset = ShaderSetup::GetIntUniformOffset(instr.flow_control.int_uniform_id);
|
||||
mov(LOOPCOUNT, dword[SETUP + offset]);
|
||||
mov(LOOPCOUNT_REG, LOOPCOUNT);
|
||||
shr(LOOPCOUNT_REG, 4);
|
||||
and(LOOPCOUNT_REG, 0xFF0); // Y-component is the start
|
||||
mov(LOOPINC, LOOPCOUNT);
|
||||
shr(LOOPINC, 12);
|
||||
and(LOOPINC, 0xFF0); // Z-component is the incrementer
|
||||
movzx(LOOPCOUNT, LOOPCOUNT.cvt8()); // X-component is iteration count
|
||||
add(LOOPCOUNT, 1); // Iteration count is X-component + 1
|
||||
|
||||
Label l_loop_start;
|
||||
L(l_loop_start);
|
||||
|
||||
Compile_Block(instr.flow_control.dest_offset + 1);
|
||||
|
||||
add(LOOPCOUNT_REG, LOOPINC); // Increment LOOPCOUNT_REG by Z-component
|
||||
sub(LOOPCOUNT, 1); // Increment loop count by 1
|
||||
jnz(l_loop_start); // Loop if not equal
|
||||
|
||||
looping = false;
|
||||
}
|
||||
|
||||
void JitShader::Compile_JMP(Instruction instr) {
|
||||
if (instr.opcode.Value() == OpCode::Id::JMPC)
|
||||
Compile_EvaluateCondition(instr);
|
||||
else if (instr.opcode.Value() == OpCode::Id::JMPU)
|
||||
Compile_UniformCondition(instr);
|
||||
else
|
||||
UNREACHABLE();
|
||||
|
||||
bool inverted_condition =
|
||||
(instr.opcode.Value() == OpCode::Id::JMPU) && (instr.flow_control.num_instructions & 1);
|
||||
|
||||
Label& b = instruction_labels[instr.flow_control.dest_offset];
|
||||
if (inverted_condition) {
|
||||
jz(b, T_NEAR);
|
||||
} else {
|
||||
jnz(b, T_NEAR);
|
||||
}
|
||||
}
|
||||
|
||||
void JitShader::Compile_Block(unsigned end) {
|
||||
while (program_counter < end) {
|
||||
Compile_NextInstr();
|
||||
}
|
||||
}
|
||||
|
||||
void JitShader::Compile_Return() {
|
||||
// Peek return offset on the stack and check if we're at that offset
|
||||
mov(rax, qword[rsp + 8]);
|
||||
cmp(eax, (program_counter));
|
||||
|
||||
// If so, jump back to before CALL
|
||||
Label b;
|
||||
jnz(b);
|
||||
ret();
|
||||
L(b);
|
||||
}
|
||||
|
||||
void JitShader::Compile_NextInstr() {
|
||||
if (std::binary_search(return_offsets.begin(), return_offsets.end(), program_counter)) {
|
||||
Compile_Return();
|
||||
}
|
||||
|
||||
L(instruction_labels[program_counter]);
|
||||
|
||||
Instruction instr = {(*program_code)[program_counter++]};
|
||||
|
||||
OpCode::Id opcode = instr.opcode.Value();
|
||||
auto instr_func = instr_table[static_cast<unsigned>(opcode)];
|
||||
|
||||
if (instr_func) {
|
||||
// JIT the instruction!
|
||||
((*this).*instr_func)(instr);
|
||||
} else {
|
||||
// Unhandled instruction
|
||||
LOG_CRITICAL(HW_GPU, "Unhandled instruction: 0x%02x (0x%08x)",
|
||||
instr.opcode.Value().EffectiveOpCode(), instr.hex);
|
||||
}
|
||||
}
|
||||
|
||||
void JitShader::FindReturnOffsets() {
|
||||
return_offsets.clear();
|
||||
|
||||
for (size_t offset = 0; offset < program_code->size(); ++offset) {
|
||||
Instruction instr = {(*program_code)[offset]};
|
||||
|
||||
switch (instr.opcode.Value()) {
|
||||
case OpCode::Id::CALL:
|
||||
case OpCode::Id::CALLC:
|
||||
case OpCode::Id::CALLU:
|
||||
return_offsets.push_back(instr.flow_control.dest_offset +
|
||||
instr.flow_control.num_instructions);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
// Sort for efficient binary search later
|
||||
std::sort(return_offsets.begin(), return_offsets.end());
|
||||
}
|
||||
|
||||
void JitShader::Compile(const std::array<u32, 1024>* program_code_,
|
||||
const std::array<u32, 1024>* swizzle_data_) {
|
||||
program_code = program_code_;
|
||||
swizzle_data = swizzle_data_;
|
||||
|
||||
// Reset flow control state
|
||||
program = (CompiledShader*)getCurr();
|
||||
program_counter = 0;
|
||||
looping = false;
|
||||
instruction_labels.fill(Xbyak::Label());
|
||||
|
||||
// Find all `CALL` instructions and identify return locations
|
||||
FindReturnOffsets();
|
||||
|
||||
// The stack pointer is 8 modulo 16 at the entry of a procedure
|
||||
ABI_PushRegistersAndAdjustStack(*this, ABI_ALL_CALLEE_SAVED, 8);
|
||||
|
||||
mov(SETUP, ABI_PARAM1);
|
||||
mov(STATE, ABI_PARAM2);
|
||||
|
||||
// Zero address/loop registers
|
||||
xor(ADDROFFS_REG_0.cvt32(), ADDROFFS_REG_0.cvt32());
|
||||
xor(ADDROFFS_REG_1.cvt32(), ADDROFFS_REG_1.cvt32());
|
||||
xor(LOOPCOUNT_REG, LOOPCOUNT_REG);
|
||||
|
||||
// Used to set a register to one
|
||||
static const __m128 one = {1.f, 1.f, 1.f, 1.f};
|
||||
mov(rax, reinterpret_cast<size_t>(&one));
|
||||
movaps(ONE, xword[rax]);
|
||||
|
||||
// Used to negate registers
|
||||
static const __m128 neg = {-0.f, -0.f, -0.f, -0.f};
|
||||
mov(rax, reinterpret_cast<size_t>(&neg));
|
||||
movaps(NEGBIT, xword[rax]);
|
||||
|
||||
// Jump to start of the shader program
|
||||
jmp(ABI_PARAM3);
|
||||
|
||||
// Compile entire program
|
||||
Compile_Block(static_cast<unsigned>(program_code->size()));
|
||||
|
||||
// Free memory that's no longer needed
|
||||
program_code = nullptr;
|
||||
swizzle_data = nullptr;
|
||||
return_offsets.clear();
|
||||
return_offsets.shrink_to_fit();
|
||||
|
||||
ready();
|
||||
|
||||
ASSERT_MSG(getSize() <= MAX_SHADER_SIZE, "Compiled a shader that exceeds the allocated size!");
|
||||
LOG_DEBUG(HW_GPU, "Compiled shader size=%lu", getSize());
|
||||
}
|
||||
|
||||
JitShader::JitShader() : Xbyak::CodeGenerator(MAX_SHADER_SIZE) {}
|
||||
|
||||
} // namespace Shader
|
||||
|
||||
} // namespace Pica
|
||||
@ -0,0 +1,125 @@
|
||||
// Copyright 2015 Citra Emulator Project
|
||||
// Licensed under GPLv2 or any later version
|
||||
// Refer to the license.txt file included.
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <array>
|
||||
#include <cstddef>
|
||||
#include <utility>
|
||||
#include <vector>
|
||||
#include <nihstro/shader_bytecode.h>
|
||||
#include <xbyak.h>
|
||||
#include "common/bit_set.h"
|
||||
#include "common/common_types.h"
|
||||
#include "common/x64/emitter.h"
|
||||
#include "video_core/shader/shader.h"
|
||||
|
||||
using nihstro::Instruction;
|
||||
using nihstro::OpCode;
|
||||
using nihstro::SwizzlePattern;
|
||||
|
||||
namespace Pica {
|
||||
|
||||
namespace Shader {
|
||||
|
||||
/// Memory allocated for each compiled shader (64Kb)
|
||||
constexpr size_t MAX_SHADER_SIZE = 1024 * 64;
|
||||
|
||||
/**
|
||||
* This class implements the shader JIT compiler. It recompiles a Pica shader program into x86_64
|
||||
* code that can be executed on the host machine directly.
|
||||
*/
|
||||
class JitShader : public Xbyak::CodeGenerator {
|
||||
public:
|
||||
JitShader();
|
||||
|
||||
void Run(const ShaderSetup& setup, UnitState& state, unsigned offset) const {
|
||||
program(&setup, &state, instruction_labels[offset].getAddress());
|
||||
}
|
||||
|
||||
void Compile(const std::array<u32, 1024>* program_code,
|
||||
const std::array<u32, 1024>* swizzle_data);
|
||||
|
||||
void Compile_ADD(Instruction instr);
|
||||
void Compile_DP3(Instruction instr);
|
||||
void Compile_DP4(Instruction instr);
|
||||
void Compile_DPH(Instruction instr);
|
||||
void Compile_EX2(Instruction instr);
|
||||
void Compile_LG2(Instruction instr);
|
||||
void Compile_MUL(Instruction instr);
|
||||
void Compile_SGE(Instruction instr);
|
||||
void Compile_SLT(Instruction instr);
|
||||
void Compile_FLR(Instruction instr);
|
||||
void Compile_MAX(Instruction instr);
|
||||
void Compile_MIN(Instruction instr);
|
||||
void Compile_RCP(Instruction instr);
|
||||
void Compile_RSQ(Instruction instr);
|
||||
void Compile_MOVA(Instruction instr);
|
||||
void Compile_MOV(Instruction instr);
|
||||
void Compile_NOP(Instruction instr);
|
||||
void Compile_END(Instruction instr);
|
||||
void Compile_CALL(Instruction instr);
|
||||
void Compile_CALLC(Instruction instr);
|
||||
void Compile_CALLU(Instruction instr);
|
||||
void Compile_IF(Instruction instr);
|
||||
void Compile_LOOP(Instruction instr);
|
||||
void Compile_JMP(Instruction instr);
|
||||
void Compile_CMP(Instruction instr);
|
||||
void Compile_MAD(Instruction instr);
|
||||
|
||||
private:
|
||||
void Compile_Block(unsigned end);
|
||||
void Compile_NextInstr();
|
||||
|
||||
void Compile_SwizzleSrc(Instruction instr, unsigned src_num, SourceRegister src_reg,
|
||||
Xbyak::Xmm dest);
|
||||
void Compile_DestEnable(Instruction instr, Xbyak::Xmm dest);
|
||||
|
||||
/**
|
||||
* Compiles a `MUL src1, src2` operation, properly handling the PICA semantics when multiplying
|
||||
* zero by inf. Clobbers `src2` and `scratch`.
|
||||
*/
|
||||
void Compile_SanitizedMul(Xbyak::Xmm src1, Xbyak::Xmm src2, Xbyak::Xmm scratch);
|
||||
|
||||
void Compile_EvaluateCondition(Instruction instr);
|
||||
void Compile_UniformCondition(Instruction instr);
|
||||
|
||||
/**
|
||||
* Emits the code to conditionally return from a subroutine envoked by the `CALL` instruction.
|
||||
*/
|
||||
void Compile_Return();
|
||||
|
||||
BitSet32 PersistentCallerSavedRegs();
|
||||
|
||||
/**
|
||||
* Assertion evaluated at compile-time, but only triggered if executed at runtime.
|
||||
* @param msg Message to be logged if the assertion fails.
|
||||
*/
|
||||
void Compile_Assert(bool condition, const char* msg);
|
||||
|
||||
/**
|
||||
* Analyzes the entire shader program for `CALL` instructions before emitting any code,
|
||||
* identifying the locations where a return needs to be inserted.
|
||||
*/
|
||||
void FindReturnOffsets();
|
||||
|
||||
const std::array<u32, 1024>* program_code = nullptr;
|
||||
const std::array<u32, 1024>* swizzle_data = nullptr;
|
||||
|
||||
/// Mapping of Pica VS instructions to pointers in the emitted code
|
||||
std::array<Xbyak::Label, 1024> instruction_labels;
|
||||
|
||||
/// Offsets in code where a return needs to be inserted
|
||||
std::vector<unsigned> return_offsets;
|
||||
|
||||
unsigned program_counter = 0; ///< Offset of the next instruction to decode
|
||||
bool looping = false; ///< True if compiling a loop, used to check for nested loops
|
||||
|
||||
using CompiledShader = void(const void* setup, void* state, const u8* start_addr);
|
||||
CompiledShader* program = nullptr;
|
||||
};
|
||||
|
||||
} // Shader
|
||||
|
||||
} // Pica
|
||||
Loading…
Reference in New Issue