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@ -96,8 +96,7 @@ public:
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u32 type;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -106,8 +105,7 @@ public:
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u32 address_low;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -124,8 +122,7 @@ public:
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Mode mode;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(offset_high) << 32) |
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offset_low);
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return (GPUVAddr{offset_high} << 32) | GPUVAddr{offset_low};
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}
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};
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@ -187,7 +184,7 @@ public:
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default:
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// Thresholds begin at 0x10 (1 << 4)
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// Threshold is in the range 0x1 to 0x13
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return 1 << (4 + threshold.Value() - 1);
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return 1U << (4 + threshold.Value() - 1);
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}
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}
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};
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@ -468,8 +465,7 @@ public:
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INSERT_PADDING_BYTES_NOINIT(0xC);
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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static_assert(sizeof(Buffer) == 0x20);
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@ -511,12 +507,11 @@ public:
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u32 default_size_per_warp;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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u64 Size() const {
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return (static_cast<u64>(size_high) << 32) | size_low;
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return (u64{size_high} << 32) | u64{size_low};
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}
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};
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@ -538,13 +533,11 @@ public:
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u32 storage_limit_address_low;
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GPUVAddr StorageAddress() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(storage_address_high) << 32) |
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storage_address_low);
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return (GPUVAddr{storage_address_high} << 32) | GPUVAddr{storage_address_low};
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}
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GPUVAddr StorageLimitAddress() const {
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return static_cast<GPUVAddr>(
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(static_cast<GPUVAddr>(storage_limit_address_high) << 32) |
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storage_limit_address_low);
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return (GPUVAddr{storage_limit_address_high} << 32) |
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GPUVAddr{storage_limit_address_low};
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}
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};
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@ -829,11 +822,11 @@ public:
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struct CompressionThresholdSamples {
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u32 samples;
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u32 Samples() {
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u32 Samples() const {
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if (samples == 0) {
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return 0;
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}
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return 1 << (samples - 1);
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return 1U << (samples - 1);
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}
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};
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@ -1138,8 +1131,7 @@ public:
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INSERT_PADDING_BYTES_NOINIT(0x18);
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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static_assert(sizeof(RenderTargetConfig) == 0x40);
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@ -1482,8 +1474,7 @@ public:
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u32 address_low;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -1533,8 +1524,7 @@ public:
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u32 address_low;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -1561,8 +1551,7 @@ public:
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u32 array_pitch;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -1910,8 +1899,7 @@ public:
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Mode mode;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -1921,8 +1909,7 @@ public:
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u32 limit;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -1932,8 +1919,7 @@ public:
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u32 limit;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -1981,8 +1967,7 @@ public:
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u32 address_low;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -2027,8 +2012,7 @@ public:
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u32 address_low;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -2224,19 +2208,16 @@ public:
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}
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GPUVAddr StartAddress() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(start_addr_high) << 32) |
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start_addr_low);
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return (GPUVAddr{start_addr_high} << 32) | GPUVAddr{start_addr_low};
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}
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GPUVAddr EndAddress() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(limit_addr_high) << 32) |
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limit_addr_low);
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return (GPUVAddr{limit_addr_high} << 32) | GPUVAddr{limit_addr_low};
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}
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/// Adjust the index buffer offset so it points to the first desired index.
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GPUVAddr IndexStart() const {
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return StartAddress() +
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static_cast<size_t>(first) * static_cast<size_t>(FormatSizeInBytes());
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return StartAddress() + size_t{first} * size_t{FormatSizeInBytes()};
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}
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};
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@ -2464,8 +2445,7 @@ public:
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} query;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -2479,8 +2459,7 @@ public:
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u32 frequency;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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bool IsEnabled() const {
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@ -2494,8 +2473,7 @@ public:
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u32 address_low;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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static_assert(sizeof(VertexStreamLimit) == 0x8);
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@ -2543,8 +2521,7 @@ public:
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std::array<u32, NumCBData> buffer;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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