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GPU: Renamed ShaderType to ShaderStage as that is less confusing.

master
Subv 2018-03-17 17:08:26 +07:00
parent 88698c156f
commit ccb8da1512
2 changed files with 19 additions and 19 deletions
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24
src/video_core/engines/maxwell_3d.cpp
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@ -44,23 +44,23 @@ void Maxwell3D::WriteReg(u32 method, u32 value) {
break; break;
} }
case MAXWELL3D_REG_INDEX(cb_bind[0].raw_config): { case MAXWELL3D_REG_INDEX(cb_bind[0].raw_config): {
ProcessCBBind(Regs::ShaderType::Vertex); ProcessCBBind(Regs::ShaderStage::Vertex);
break; break;
} }
case MAXWELL3D_REG_INDEX(cb_bind[1].raw_config): { case MAXWELL3D_REG_INDEX(cb_bind[1].raw_config): {
ProcessCBBind(Regs::ShaderType::TesselationControl); ProcessCBBind(Regs::ShaderStage::TesselationControl);
break; break;
} }
case MAXWELL3D_REG_INDEX(cb_bind[2].raw_config): { case MAXWELL3D_REG_INDEX(cb_bind[2].raw_config): {
ProcessCBBind(Regs::ShaderType::TesselationEval); ProcessCBBind(Regs::ShaderStage::TesselationEval);
break; break;
} }
case MAXWELL3D_REG_INDEX(cb_bind[3].raw_config): { case MAXWELL3D_REG_INDEX(cb_bind[3].raw_config): {
ProcessCBBind(Regs::ShaderType::Geometry); ProcessCBBind(Regs::ShaderStage::Geometry);
break; break;
} }
case MAXWELL3D_REG_INDEX(cb_bind[4].raw_config): { case MAXWELL3D_REG_INDEX(cb_bind[4].raw_config): {
ProcessCBBind(Regs::ShaderType::Fragment); ProcessCBBind(Regs::ShaderStage::Fragment);
break; break;
} }
case MAXWELL3D_REG_INDEX(draw.vertex_end_gl): { case MAXWELL3D_REG_INDEX(draw.vertex_end_gl): {
@ -106,18 +106,18 @@ void Maxwell3D::SetShader(const std::vector<u32>& parameters) {
* [0] = Shader Program. * [0] = Shader Program.
* [1] = Unknown, presumably the shader id. * [1] = Unknown, presumably the shader id.
* [2] = Offset to the start of the shader, after the 0x30 bytes header. * [2] = Offset to the start of the shader, after the 0x30 bytes header.
* [3] = Shader Type. * [3] = Shader Stage.
* [4] = Const Buffer Address >> 8. * [4] = Const Buffer Address >> 8.
*/ */
auto shader_program = static_cast<Regs::ShaderProgram>(parameters[0]); auto shader_program = static_cast<Regs::ShaderProgram>(parameters[0]);
// TODO(Subv): This address is probably an offset from the CODE_ADDRESS register. // TODO(Subv): This address is probably an offset from the CODE_ADDRESS register.
GPUVAddr address = parameters[2]; GPUVAddr address = parameters[2];
auto shader_type = static_cast<Regs::ShaderType>(parameters[3]); auto shader_stage = static_cast<Regs::ShaderStage>(parameters[3]);
GPUVAddr cb_address = parameters[4] << 8; GPUVAddr cb_address = parameters[4] << 8;
auto& shader = state.shader_programs[static_cast<size_t>(shader_program)]; auto& shader = state.shader_programs[static_cast<size_t>(shader_program)];
shader.program = shader_program; shader.program = shader_program;
shader.type = shader_type; shader.stage = shader_stage;
shader.address = address; shader.address = address;
// Perform the same operations as the real macro code. // Perform the same operations as the real macro code.
@ -135,13 +135,13 @@ void Maxwell3D::SetShader(const std::vector<u32>& parameters) {
// Write a hardcoded 0x11 to CB_BIND, this binds the current const buffer to buffer c1[] in the // Write a hardcoded 0x11 to CB_BIND, this binds the current const buffer to buffer c1[] in the
// shader. It's likely that these are the constants for the shader. // shader. It's likely that these are the constants for the shader.
regs.cb_bind[static_cast<size_t>(shader_type)].valid.Assign(1); regs.cb_bind[static_cast<size_t>(shader_stage)].valid.Assign(1);
regs.cb_bind[static_cast<size_t>(shader_type)].index.Assign(1); regs.cb_bind[static_cast<size_t>(shader_stage)].index.Assign(1);
ProcessCBBind(shader_type); ProcessCBBind(shader_stage);
} }
void Maxwell3D::ProcessCBBind(Regs::ShaderType stage) { void Maxwell3D::ProcessCBBind(Regs::ShaderStage stage) {
// Bind the buffer currently in CB_ADDRESS to the specified index in the desired shader stage. // Bind the buffer currently in CB_ADDRESS to the specified index in the desired shader stage.
auto& shader = state.shader_stages[static_cast<size_t>(stage)]; auto& shader = state.shader_stages[static_cast<size_t>(stage)];
auto& bind_data = regs.cb_bind[static_cast<size_t>(stage)]; auto& bind_data = regs.cb_bind[static_cast<size_t>(stage)];

14
src/video_core/engines/maxwell_3d.h
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@ -38,7 +38,7 @@ public:
static constexpr size_t NumCBData = 16; static constexpr size_t NumCBData = 16;
static constexpr size_t NumVertexArrays = 32; static constexpr size_t NumVertexArrays = 32;
static constexpr size_t MaxShaderProgram = 6; static constexpr size_t MaxShaderProgram = 6;
static constexpr size_t MaxShaderType = 5; static constexpr size_t MaxShaderStage = 5;
// Maximum number of const buffers per shader stage. // Maximum number of const buffers per shader stage.
static constexpr size_t MaxConstBuffers = 16; static constexpr size_t MaxConstBuffers = 16;
@ -56,7 +56,7 @@ public:
Fragment = 5, Fragment = 5,
}; };
enum class ShaderType : u32 { enum class ShaderStage : u32 {
Vertex = 0, Vertex = 0,
TesselationControl = 1, TesselationControl = 1,
TesselationEval = 2, TesselationEval = 2,
@ -136,7 +136,7 @@ public:
u32 start_id; u32 start_id;
INSERT_PADDING_WORDS(1); INSERT_PADDING_WORDS(1);
u32 gpr_alloc; u32 gpr_alloc;
ShaderType type; ShaderStage type;
INSERT_PADDING_WORDS(9); INSERT_PADDING_WORDS(9);
} shader_config[MaxShaderProgram]; } shader_config[MaxShaderProgram];
@ -164,7 +164,7 @@ public:
BitField<4, 5, u32> index; BitField<4, 5, u32> index;
}; };
INSERT_PADDING_WORDS(7); INSERT_PADDING_WORDS(7);
} cb_bind[MaxShaderType]; } cb_bind[MaxShaderStage];
INSERT_PADDING_WORDS(0x50A); INSERT_PADDING_WORDS(0x50A);
}; };
@ -183,7 +183,7 @@ public:
}; };
struct ShaderProgramInfo { struct ShaderProgramInfo {
Regs::ShaderType type; Regs::ShaderStage stage;
Regs::ShaderProgram program; Regs::ShaderProgram program;
GPUVAddr address; GPUVAddr address;
}; };
@ -192,7 +192,7 @@ public:
std::array<ConstBufferInfo, Regs::MaxConstBuffers> const_buffers; std::array<ConstBufferInfo, Regs::MaxConstBuffers> const_buffers;
}; };
std::array<ShaderStageInfo, Regs::MaxShaderType> shader_stages; std::array<ShaderStageInfo, Regs::MaxShaderStage> shader_stages;
std::array<ShaderProgramInfo, Regs::MaxShaderProgram> shader_programs; std::array<ShaderProgramInfo, Regs::MaxShaderProgram> shader_programs;
}; };
@ -205,7 +205,7 @@ private:
void ProcessQueryGet(); void ProcessQueryGet();
/// Handles a write to the CB_BIND register. /// Handles a write to the CB_BIND register.
void ProcessCBBind(Regs::ShaderType stage); void ProcessCBBind(Regs::ShaderStage stage);
/// Handles a write to the VERTEX_END_GL register, triggering a draw. /// Handles a write to the VERTEX_END_GL register, triggering a draw.
void DrawArrays(); void DrawArrays();