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@ -39,6 +39,14 @@ u32 ShaderIR::DecodeShift(BasicBlock& bb, u32 pc) {
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SetRegister(bb, instr.gpr0, value);
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SetRegister(bb, instr.gpr0, value);
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break;
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break;
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}
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}
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case OpCode::Id::SHL_C:
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case OpCode::Id::SHL_R:
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case OpCode::Id::SHL_IMM:
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UNIMPLEMENTED_IF_MSG(instr.generates_cc,
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"Condition codes generation in SHL is not implemented");
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SetRegister(bb, instr.gpr0,
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Operation(OperationCode::ILogicalShiftLeft, PRECISE, op_a, op_b));
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break;
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default:
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default:
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UNIMPLEMENTED_MSG("Unhandled shift instruction: {}", opcode->get().GetName());
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UNIMPLEMENTED_MSG("Unhandled shift instruction: {}", opcode->get().GetName());
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}
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}
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