gl_shader_decompiler: Implement HADD2_IMM and HMUL2_IMM

master
ReinUsesLisp 2018-10-15 02:07:16 +07:00
parent d46e2a6e7a
commit d93cdc2750
2 changed files with 73 additions and 0 deletions

@ -589,6 +589,31 @@ union Instruction {
BitField<35, 2, HalfType> type_c; BitField<35, 2, HalfType> type_c;
} alu_half; } alu_half;
union {
BitField<39, 2, HalfPrecision> precision;
BitField<39, 1, u64> ftz;
BitField<52, 1, u64> saturate;
BitField<49, 2, HalfMerge> merge;
BitField<43, 1, u64> negate_a;
BitField<44, 1, u64> abs_a;
BitField<47, 2, HalfType> type_a;
} alu_half_imm;
union {
BitField<29, 1, u64> first_negate;
BitField<20, 9, u64> first;
BitField<56, 1, u64> second_negate;
BitField<30, 9, u64> second;
u32 PackImmediates() const {
// Immediates are half floats shifted.
constexpr u32 imm_shift = 6;
return static_cast<u32>((first << imm_shift) | (second << (16 + imm_shift)));
}
} half_imm;
union { union {
BitField<40, 1, u64> invert; BitField<40, 1, u64> invert;
} popc; } popc;
@ -1183,8 +1208,10 @@ public:
LEA_HI, LEA_HI,
HADD2_C, HADD2_C,
HADD2_R, HADD2_R,
HADD2_IMM,
HMUL2_C, HMUL2_C,
HMUL2_R, HMUL2_R,
HMUL2_IMM,
POPC_C, POPC_C,
POPC_R, POPC_R,
POPC_IMM, POPC_IMM,
@ -1259,6 +1286,7 @@ public:
ArithmeticInteger, ArithmeticInteger,
ArithmeticIntegerImmediate, ArithmeticIntegerImmediate,
ArithmeticHalf, ArithmeticHalf,
ArithmeticHalfImmediate,
Bfe, Bfe,
Shift, Shift,
Ffma, Ffma,
@ -1432,8 +1460,10 @@ private:
INST("00011000--------", Id::LEA_HI, Type::ArithmeticInteger, "LEA_HI"), INST("00011000--------", Id::LEA_HI, Type::ArithmeticInteger, "LEA_HI"),
INST("0111101-1-------", Id::HADD2_C, Type::ArithmeticHalf, "HADD2_C"), INST("0111101-1-------", Id::HADD2_C, Type::ArithmeticHalf, "HADD2_C"),
INST("0101110100010---", Id::HADD2_R, Type::ArithmeticHalf, "HADD2_R"), INST("0101110100010---", Id::HADD2_R, Type::ArithmeticHalf, "HADD2_R"),
INST("0111101-0-------", Id::HADD2_IMM, Type::ArithmeticHalfImmediate, "HADD2_IMM"),
INST("0111100-1-------", Id::HMUL2_C, Type::ArithmeticHalf, "HMUL2_C"), INST("0111100-1-------", Id::HMUL2_C, Type::ArithmeticHalf, "HMUL2_C"),
INST("0101110100001---", Id::HMUL2_R, Type::ArithmeticHalf, "HMUL2_R"), INST("0101110100001---", Id::HMUL2_R, Type::ArithmeticHalf, "HMUL2_R"),
INST("0111100-0-------", Id::HMUL2_IMM, Type::ArithmeticHalfImmediate, "HMUL2_IMM"),
INST("0101000010000---", Id::MUFU, Type::Arithmetic, "MUFU"), INST("0101000010000---", Id::MUFU, Type::Arithmetic, "MUFU"),
INST("0100110010010---", Id::RRO_C, Type::Arithmetic, "RRO_C"), INST("0100110010010---", Id::RRO_C, Type::Arithmetic, "RRO_C"),
INST("0101110010010---", Id::RRO_R, Type::Arithmetic, "RRO_R"), INST("0101110010010---", Id::RRO_R, Type::Arithmetic, "RRO_R"),

@ -920,6 +920,19 @@ private:
return fmt::format("uintBitsToFloat({})", instr.alu.GetImm20_32()); return fmt::format("uintBitsToFloat({})", instr.alu.GetImm20_32());
} }
/// Generates code representing a vec2 pair unpacked from a half float immediate
static std::string UnpackHalfImmediate(const Instruction& instr, bool negate) {
const std::string immediate = GetHalfFloat(std::to_string(instr.half_imm.PackImmediates()));
if (!negate) {
return immediate;
}
const std::string negate_first = instr.half_imm.first_negate != 0 ? "-" : "";
const std::string negate_second = instr.half_imm.second_negate != 0 ? "-" : "";
const std::string negate_vec = "vec2(" + negate_first + "1, " + negate_second + "1)";
return '(' + immediate + " * " + negate_vec + ')';
}
/// Generates code representing a texture sampler. /// Generates code representing a texture sampler.
std::string GetSampler(const Sampler& sampler, Tegra::Shader::TextureType type, bool is_array, std::string GetSampler(const Sampler& sampler, Tegra::Shader::TextureType type, bool is_array,
bool is_shadow) { bool is_shadow) {
@ -1877,6 +1890,36 @@ private:
instr.alu_half.saturate != 0); instr.alu_half.saturate != 0);
break; break;
} }
case OpCode::Type::ArithmeticHalfImmediate: {
if (opcode->GetId() == OpCode::Id::HADD2_IMM) {
ASSERT_MSG(instr.alu_half_imm.ftz == 0, "Unimplemented");
} else {
ASSERT_MSG(instr.alu_half_imm.precision == Tegra::Shader::HalfPrecision::None,
"Unimplemented");
}
const std::string op_a = GetHalfFloat(
regs.GetRegisterAsInteger(instr.gpr8, 0, false), instr.alu_half_imm.type_a,
instr.alu_half_imm.abs_a != 0, instr.alu_half_imm.negate_a != 0);
const std::string op_b = UnpackHalfImmediate(instr, true);
const std::string result = [&]() {
switch (opcode->GetId()) {
case OpCode::Id::HADD2_IMM:
return op_a + " + " + op_b;
case OpCode::Id::HMUL2_IMM:
return op_a + " * " + op_b;
default:
UNREACHABLE();
return std::string("0");
}
}();
regs.SetRegisterToHalfFloat(instr.gpr0, 0, result, instr.alu_half_imm.merge, 1, 1,
instr.alu_half_imm.saturate != 0);
break;
}
case OpCode::Type::Ffma: { case OpCode::Type::Ffma: {
const std::string op_a = regs.GetRegisterAsFloat(instr.gpr8); const std::string op_a = regs.GetRegisterAsFloat(instr.gpr8);
std::string op_b = instr.ffma.negate_b ? "-" : ""; std::string op_b = instr.ffma.negate_b ? "-" : "";