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@ -146,6 +146,7 @@ struct FixedPipelineState {
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BitField<3, 1, u32> primitive_restart_enable;
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BitField<3, 1, u32> primitive_restart_enable;
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BitField<4, 1, u32> depth_bias_enable;
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BitField<4, 1, u32> depth_bias_enable;
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BitField<5, 1, u32> rasterize_enable;
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BitField<5, 1, u32> rasterize_enable;
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BitField<6, 4, u32> logic_op;
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};
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};
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union {
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union {
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u32 raw2;
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u32 raw2;
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@ -162,7 +163,7 @@ struct FixedPipelineState {
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std::array<u16, Maxwell::NumVertexArrays> vertex_strides;
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std::array<u16, Maxwell::NumVertexArrays> vertex_strides;
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void Refresh(const Maxwell& regs);
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void Refresh(const Maxwell& regs);
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void Refresh2(const Maxwell& regs, Maxwell::PrimitiveTopology topology);
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void Refresh2(const Maxwell& regs, Maxwell::PrimitiveTopology topology, bool base_feautures_supported);
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void Refresh3(const Maxwell& regs);
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void Refresh3(const Maxwell& regs);
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Maxwell::ComparisonOp DepthTestFunc() const noexcept {
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Maxwell::ComparisonOp DepthTestFunc() const noexcept {
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@ -182,18 +183,19 @@ struct FixedPipelineState {
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u32 raw1;
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u32 raw1;
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BitField<0, 1, u32> extended_dynamic_state;
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BitField<0, 1, u32> extended_dynamic_state;
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BitField<1, 1, u32> extended_dynamic_state_2;
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BitField<1, 1, u32> extended_dynamic_state_2;
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BitField<2, 1, u32> extended_dynamic_state_3;
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BitField<2, 1, u32> extended_dynamic_state_2_extra;
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BitField<3, 1, u32> dynamic_vertex_input;
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BitField<3, 1, u32> extended_dynamic_state_3;
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BitField<4, 1, u32> xfb_enabled;
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BitField<4, 1, u32> dynamic_vertex_input;
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BitField<5, 1, u32> depth_clamp_disabled;
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BitField<5, 1, u32> xfb_enabled;
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BitField<6, 1, u32> ndc_minus_one_to_one;
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BitField<6, 1, u32> depth_clamp_disabled;
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BitField<7, 2, u32> polygon_mode;
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BitField<7, 1, u32> ndc_minus_one_to_one;
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BitField<9, 5, u32> patch_control_points_minus_one;
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BitField<8, 2, u32> polygon_mode;
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BitField<14, 2, u32> tessellation_primitive;
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BitField<10, 2, u32> tessellation_primitive;
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BitField<16, 2, u32> tessellation_spacing;
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BitField<12, 2, u32> tessellation_spacing;
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BitField<18, 1, u32> tessellation_clockwise;
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BitField<14, 1, u32> tessellation_clockwise;
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BitField<19, 1, u32> logic_op_enable;
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BitField<15, 1, u32> logic_op_enable;
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BitField<20, 4, u32> logic_op;
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BitField<16, 5, u32> patch_control_points_minus_one;
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BitField<24, 4, Maxwell::PrimitiveTopology> topology;
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BitField<24, 4, Maxwell::PrimitiveTopology> topology;
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BitField<28, 4, Tegra::Texture::MsaaMode> msaa_mode;
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BitField<28, 4, Tegra::Texture::MsaaMode> msaa_mode;
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};
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};
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@ -246,7 +248,7 @@ struct FixedPipelineState {
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// Exclude dynamic state and attributes
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// Exclude dynamic state and attributes
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return offsetof(FixedPipelineState, attributes);
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return offsetof(FixedPipelineState, attributes);
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}
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}
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if (extended_dynamic_state_2) {
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if (extended_dynamic_state_2_extra) {
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// Exclude dynamic state
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// Exclude dynamic state
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return offsetof(FixedPipelineState, dynamic_state);
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return offsetof(FixedPipelineState, dynamic_state);
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}
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}
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