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@ -144,10 +144,11 @@ u32 ShaderIR::DecodeArithmetic(NodeBlock& bb, u32 pc) {
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case OpCode::Id::RRO_C:
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case OpCode::Id::RRO_C:
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case OpCode::Id::RRO_R:
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case OpCode::Id::RRO_R:
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case OpCode::Id::RRO_IMM: {
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case OpCode::Id::RRO_IMM: {
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LOG_DEBUG(HW_GPU, "(STUBBED) RRO used");
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// Currently RRO is only implemented as a register move.
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// Currently RRO is only implemented as a register move.
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op_b = GetOperandAbsNegFloat(op_b, instr.alu.abs_b, instr.alu.negate_b);
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op_b = GetOperandAbsNegFloat(op_b, instr.alu.abs_b, instr.alu.negate_b);
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SetRegister(bb, instr.gpr0, op_b);
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SetRegister(bb, instr.gpr0, op_b);
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LOG_WARNING(HW_GPU, "RRO instruction is incomplete");
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break;
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break;
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}
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}
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default:
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default:
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